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AgeCommit message (Expand)AuthorFilesLines
2022-07-06x86: make D attribute usable for XOP and FMA4 insnsJan Beulich1-7/+35
2022-07-06x86: fold two switch() statements in match_template()Jan Beulich1-16/+3
2022-07-06x86: fix 3-operand insn reverse-matchingJan Beulich1-2/+4
2022-07-06x86: introduce a state stack for .archJan Beulich1-1/+80
2022-07-06x86: generalize disabling of sub-architecturesJan Beulich1-235/+179
2022-07-06x86: permit "default" with .archJan Beulich1-7/+49
2022-07-06x86: don't leak sub-architecture accumulated stringsJan Beulich1-0/+3
2022-07-05x86: introduce fake processor type to mark sub-arch entries in cpu_arch[]Jan Beulich2-4/+10
2022-07-05x86: macro-ize cpu_arch[] entriesJan Beulich1-308/+164
2022-07-05x86: de-duplicate sub-architecture strings accumulationJan Beulich1-38/+14
2022-07-04x86: fold Disp32S and Disp32Jan Beulich2-75/+42
2022-07-04x86: restore masking of displacement kindsJan Beulich1-16/+15
2022-07-04x86-64: improve handling of branches to absolute addressesJan Beulich1-2/+6
2022-06-29opcodes/aarch64: split off creation of comment text in disassemblerAndrew Burgess1-1/+11
2022-06-28RISC-V: Add 'Sstc' extension and its CSRsTsukasa OI1-0/+14
2022-06-28RISC-V: Add 'Sscofpmf' extension with its CSRsTsukasa OI1-0/+8
2022-06-28RISC-V: Add 'Smstateen' extension and its CSRsTsukasa OI1-0/+14
2022-06-28RISC-V: Add new CSR feature gate handling (RV32,H)Tsukasa OI1-4/+7
2022-06-27drop XC16x bitsJan Beulich2-409/+0
2022-06-22RISC-V: Use single h extension to control hypervisor CSRs and instructions.Nelson Chu1-1/+9
2022-06-22RISC-V: Fix inconsistent error message (range)Tsukasa OI1-1/+1
2022-06-17PR29256, memory leak in obj_elf_section_nameAlan Modra1-14/+18
2022-06-14BFD_RELOC_MIPS_16Alan Modra1-8/+8
2022-06-14gas dwarf2dbg.c tidyAlan Modra1-2/+2
2022-06-03Re: ubsan: undefined shift in frag_align_codeAlan Modra1-1/+2
2022-06-03x86: exclude certain ISA extensions from v3/v4 ISAJan Beulich1-4/+7
2022-05-31ia64 gas: Remove unnecessary initAlan Modra1-2/+0
2022-05-27Remove use of bfd_uint64_t and similarAlan Modra8-70/+55
2022-05-27x86/Intel: allow MASM representation of embedded rounding / SAEJan Beulich2-22/+38
2022-05-27x86: re-work AVX512 embedded rounding / SAEJan Beulich2-72/+73
2022-05-27x86/Intel: allow MASM representation of embedded broadcastJan Beulich2-12/+104
2022-05-26 arm: avoid use of GNU builtin function in s_arm_unwind_save_mixedRichard Earnshaw1-40/+17
2022-05-25ppc: extend opindex to 16 bitsDmitry Selyutin1-6/+6
2022-05-19arm: Fix system register fpcxt_ns and fpcxt_s naming convention.Srinath Parvathaneni1-3/+11
2022-05-19Arm64: force emission of ILP32-dependent relocsJan Beulich1-1/+1
2022-05-18Arm64: follow-on to PR gas/27217 fixJan Beulich1-2/+7
2022-05-18arm: Add unwind support for mixed register listsVictor Do Nascimento1-33/+84
2022-05-18gas: fold do_repeat{,_with_expander}()Jan Beulich2-2/+2
2022-05-17RISC-V: Added half-precision floating-point v1.0 instructions.Nelson Chu1-1/+11
2022-05-16IBM zSystems: Fix left-shifting negative PCRel32 values (PR gas/29152)Ilya Leoshkevich1-3/+3
2022-05-12Re: IBM zSystems: Accept (. - 0x100000000) PCRel32 operandsAlan Modra1-5/+5
2022-05-10gas: remove use of PTRAlan Modra1-1/+1
2022-05-09IBM zSystems: Accept (. - 0x100000000) PCRel32 operandsIlya Leoshkevich1-5/+9
2022-04-21Delete unused COFF gas macroAlan Modra1-6/+3
2022-04-20x86: reject all invalid SAE variantsJan Beulich1-1/+1
2022-04-19x86: don't mistake ordinary immediates for SAE / rounding controlJan Beulich1-0/+5
2022-04-14M68K: avoid quadratic slowdlow in label alignment checkSergei Trofimovich2-34/+26
2022-04-12gas: new_logical_line{,_flags}() can return "void"Jan Beulich1-1/+1
2022-04-12gas: drop .appfile and .applineJan Beulich10-53/+38
2022-04-12x86: make {disp16} work similarly to {disp32}Jan Beulich1-3/+3
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