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2022-09-05x86: Handle V8BF in expand_vec_perm_broadcast_1konglin13-9/+14
2022-09-03nvptx: Silence unused variable warning in output_constant_pool_contents()Jan-Benedict Glaw1-0/+3
2022-09-02d: Fix #error You must define PREFERRED_DEBUGGING_TYPE if DWARF is not supportedIain Buclaw43-88/+237
2022-09-02rs6000: Use NO_EXPR to cast to MMA pointer typesPeter Bergner1-4/+4
2022-09-02RISC-V: Implement TARGET_COMPUTE_MULTILIBKito Cheng3-2/+10
2022-09-02pdp11: no debugging infoMartin Liska1-1/+2
2022-09-02STABS: remove -gstabs and -gxcoff functionalityMartin Liska40-400/+15
2022-09-02ipa: Fix throw in multi-versioned functions [PR106627]Simon Rainer2-0/+2
2022-09-01AArch64: Fix bootstrap failure due to dump_printf_loc format attribute uses [...Tamar Christina1-1/+2
2022-09-01i386: Fix conversion of move to/from AX_REG into xchg [PR106707]Uros Bizjak1-2/+2
2022-08-31rs6000: Don't ICE when we disassemble an MMA variable [PR101322]Peter Bergner1-1/+6
2022-09-01RISC-V: Add vector registers in TARGET_CONDITIONAL_REGISTER_USAGEzhongjuzhe1-0/+9
2022-09-01RISC-V: Add csrr vlenb instruction.zhongjuzhe2-22/+69
2022-09-01RISC-V: Add RVV constraints.zhongjuzhe1-0/+20
2022-09-01RISC-V: Fix comment in riscv.hzhongjuzhe1-1/+1
2022-09-01RISC-V: Fix riscv_vector_chunks configuration according to TARGET_MIN_VLENzhongjuzhe2-7/+8
2022-08-3132-bit PA-RISC with HP-UX: remove deprecated portsMartin Liska3-181/+0
2022-08-30amdgcn: OpenMP SIMD routine supportAndrew Stubbs1-0/+63
2022-08-30m32c-rtems: remove obsoleted portMartin Liska1-38/+0
2022-08-30s390: fix build on 32-bit hostsMartin Liska1-1/+1
2022-08-29bpf: handle anonymous members in CO-RE reloc [PR106745]David Faust1-6/+10
2022-08-29bpf: define __bpf__ as well as __BPF__ as a target macroJose E. Marchesi1-0/+1
2022-08-29x86: Handle V16BF in ix86_avx256_split_vector_move_misalignH.J. Lu2-2/+6
2022-08-29s390: Change SET rtx_cost handling.Robin Dapp1-37/+93
2022-08-29s390: Recognize reverse/element swap permute patterns.Robin Dapp2-2/+138
2022-08-29s390: Implement vec_extract via vec_select.Robin Dapp3-53/+61
2022-08-29s390: Use vpdi and verllg in vec_reve.Robin Dapp2-0/+69
2022-08-29s390: Add z15 to s390_issue_rate.Robin Dapp1-0/+1
2022-08-29s390: Add -munroll-only-small-loops.Robin Dapp2-0/+35
2022-08-29RISC-V: Suppress -Wclass-memaccess warningKito Cheng1-1/+21
2022-08-29RISC-V: Add RVV registerszhongjuzhe3-19/+173
2022-08-29RISC-V: Add RVV instructions classificationzhongjuzhe1-1/+99
2022-08-27rs6000: Allow conversions of MMA pointer types [PR106017]Peter Bergner1-22/+0
2022-08-27contrib: modernize gen_autofdo_event.pyXi Ruoyao1-14/+17
2022-08-26Implement __builtin_issignalingJakub Jelinek1-0/+52
2022-08-26cr16: remove obsoleted portMartin Liska8-4321/+0
2022-08-26Don't gimple fold ymm-version vblendvpd/vblendvps/vpblendvb w/o TARGET_AVX2liuhongt2-5/+11
2022-08-25PR 106101: IBM zSystems: Fix strict_low_part problemAndreas Krebbel4-22/+54
2022-08-25LoongArch: add model attributeXi Ruoyao2-21/+177
2022-08-25LoongArch: Avoid RTL flag check failure in loongarch_classify_symbolXi Ruoyao1-3/+2
2022-08-25LoongArch: Fix pr106459 by use HWIT instead of 1UL.Chenghua Xu2-9/+12
2022-08-24[RISCV] Fix PR 106632 and PR 106588 a few constraints in bitmanip.mdAndrew Pinski1-4/+4
2022-08-24[RISCV] Add constraints for not_single_bit_mask_operand/single_bit_mask_operandAndrew Pinski2-3/+13
2022-08-24[RISCV] Fix PR 106586: riscv32 vs ZBSAndrew Pinski3-6/+14
2022-08-24[RISCV] Use a constraint for bset<mode>_mask and bset<mode>_1_maskAndrew Pinski3-2/+15
2022-08-24[RISCV] Use constraints/predicates instead of checking const_int directly for...Andrew Pinski3-5/+14
2022-08-24[RISCV] Add %~ to print w if TARGET_64BIT and use itAndrew Pinski3-10/+30
2022-08-24[RISCV] Add the list of operand modifiers to riscv.md tooAndrew Pinski2-1/+17
2022-08-24[RISCV] Move iterators from sync.md to iterators.mdAndrew Pinski2-4/+7
2022-08-24[RISCV] Move iterators from bitmanip.md to iterators.mdAndrew Pinski2-26/+26