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2 daysRISC-V: Fix the the operand alignment for strided load/store pattern [NFC]Pan Li1-2/+2
3 days[RISC-V][PR middle-end/118084] Fix brev based reflection codeJeff Law1-6/+15
4 daysi386: Disable SImode/DImode moves from/to mask regs without avx512bw [PR118067]Uros Bizjak1-3/+9
4 daysAArch64: Implement vector concat of partial SVE vectors [PR96342]Tamar Christina4-2/+66
4 daysAArch64: Add SVE support for simd clones [PR96342]Tamar Christina3-30/+156
4 daysarm: [MVE intrinsics] Fix moves of tuples (PR target/118131)Christophe Lyon3-10/+41
5 daysRISC-V: Make vector strided store alias all other memoriesPan Li1-10/+9
5 daysFix bootstrap failure on SPARC with -O3 -mvis3Eric Botcazou2-10/+36
5 daysRevert "PR81358: Enable automatic linking of libatomic."Prathamesh Kulkarni1-2/+1
6 daysarm: Escape semicolon in thumb1.mdTorbjörn SVENSSON1-2/+2
6 daysPR81358: Enable automatic linking of libatomic.Prathamesh Kulkarni1-1/+2
6 daysLoongArch: Combine xor and crc instructionsXi Ruoyao1-0/+25
6 daysLoongArch: Add CRC expander to generate faster CRCXi Ruoyao1-0/+57
6 daysLoongArch: Add bit reverse operationsXi Ruoyao1-0/+51
6 daysLoongArch: Remove QHSD and use QHWD insteadXi Ruoyao1-3/+2
7 days[PATCH] RISC-V: optimization on checking certain bits set ((x & mask) == val)Oliver Kozul1-0/+28
7 days[PATCH v2 2/2] RISC-V: Add Tenstorrent Ascalon 8 wide architectureAnton Blanchard2-0/+30
7 daysRISC-V: Add new constraint R for register even-odd pairsKito Cheng1-0/+4
7 daysRISC-V: Implment N modifier for printing the register number rather than the ...Kito Cheng1-0/+23
7 daysRISC-V: Rename internal operand modifier N to nKito Cheng3-5/+5
7 daysRISC-V: Add cr and cf constraintKito Cheng3-11/+29
7 daysRISC-V: Rename constraint c0* to k0*Kito Cheng4-233/+233
7 daysi386: Fix tabs vs. spaces in mmx.mdUros Bizjak1-140/+140
7 daysi386: Add HImode to VALID_SSE2_REG_MODEUros Bizjak2-5/+1
8 daysvect: Do not try to duplicate_and_interleave one-element mode.Robin Dapp1-9/+0
8 daysRISC-V: Fix compress shuffle pattern [PR117383].Robin Dapp2-3/+4
8 daysRISC-V: Increase cost for vec_construct [PR118019].Robin Dapp1-1/+7
8 dayshppa: Implement TARGET_FRAME_POINTER_REQUIREDJohn David Anglin1-0/+16
9 daysarm: fix bootstrap after MVE changesTamar Christina1-2/+2
9 daysbpf: fix build adding new required arg to RESOLVE_OVERLOADED_BUILTINJose E. Marchesi1-1/+2
11 daysarm: [MVE intrinsics] Fix support for predicate constants [PR target/114801]Christophe Lyon1-1/+31
11 daysarm: [MVE intrinsics] rework vst2q vst4q vld2q vld4qChristophe Lyon11-683/+253
11 daysarm: [MVE intrinsics] fix store shape to support tuplesChristophe Lyon1-2/+2
11 daysarm: [MVE intrinsics] add support for tuplesChristophe Lyon3-13/+68
11 daysarm: [MVE intrinsics] add modes for tuplesChristophe Lyon1-0/+22
11 daysarm: [MVE intrinsics] remove V2DF from MVE_vecs iteratorChristophe Lyon1-1/+1
11 daysarm: [MVE intrinsics] Fix condition for vec_extract patternsChristophe Lyon1-4/+2
11 daysarm: [MVE intrinsics] remove useless call_properties implementations.Christophe Lyon1-10/+0
11 daysarm: [MVE intrinsics] rework vldr gather_base_wbChristophe Lyon8-496/+74
11 daysarm: [MVE intrinsics] rework vldr gather_baseChristophe Lyon9-245/+71
11 daysarm: [MVE intrinsics] add load_gather_base shapeChristophe Lyon2-0/+39
11 daysarm: [MVE intrinsics] rework vldr gather_shifted_offsetChristophe Lyon9-653/+129
11 daysarm: [MVE intrinsics] rework vldr gather_offsetChristophe Lyon8-884/+156
11 daysarm: [MVE intrinsics] add load_ext_gather_offset shapeChristophe Lyon2-0/+59
11 daysarm: [MVE intrinsics] rework vstr scatter_base_wbChristophe Lyon10-378/+128
11 daysarm: [MVE intrinsics] rework vstr scatter_baseChristophe Lyon9-360/+72
11 daysarm: [MVE intrinsics] Add store_scatter_base shapeChristophe Lyon2-0/+50
11 daysarm: [MVE intrinsics] Check immediate is a multiple in a rangeChristophe Lyon2-0/+63
11 daysarm: [MVE intrinsics] rework vstr_scatter_shifted_offsetChristophe Lyon9-786/+103
11 daysarm: [MVE intrinsics] rework vstr?q_scatter_offsetChristophe Lyon9-1017/+143