aboutsummaryrefslogtreecommitdiff
path: root/gcc/config
AgeCommit message (Expand)AuthorFilesLines
2018-10-25rl78.c (insn_ok_now): Always re-recognize the insn if returning false.Jeff Law1-23/+29
2018-10-25S/390: Merge movdi_larl into movdi_64Ilya Leoshkevich3-17/+19
2018-10-24rs6000.c (TARGET_MANGLE_DECL_ASSEMBLER_NAME): Define as rs6000_mangle_decl_as...Michael Meissner1-0/+73
2018-10-24emmintrin.h (_mm_cvtpd_epi32): Change deprecated __vector long to __vector lo...William Schmidt1-6/+11
2018-10-24S/390: Fix ICE in s390_check_qrst_address ()Ilya Leoshkevich1-1/+3
2018-10-23h8300.c (h8300_expand_prologue): Fix stm generation for H8/S.Jeff Law1-3/+3
2018-10-23re PR target/87674 (AVX512: incorrect intrinsic signature)Jakub Jelinek3-6/+6
2018-10-22rs6000: Handle print_operand_address for unexpected RTL (PR87598)Segher Boessenkool1-1/+1
2018-10-22Index...William Schmidt2-4/+8
2018-10-22S/390: Make "b" constraint match literal pool referencesIlya Leoshkevich1-4/+5
2018-10-22i386: Enable AVX512 memory broadcast for INT andnotH.J. Lu1-0/+13
2018-10-22i386: Enable AVX512 memory broadcast for INT logicH.J. Lu1-0/+12
2018-10-22i386: Enable AVX512 memory broadcast for INT addH.J. Lu1-1/+28
2018-10-21emmintrin.h (_mm_movemask_pd): Replace __vector __m64 with __vector unsigned ...William Schmidt2-26/+32
2018-10-21i386: Enable AVX512 memory broadcast for FNMSUBH.J. Lu5-68/+162
2018-10-21i386: Enable AVX512 memory broadcast for FNMADDH.J. Lu5-106/+203
2018-10-21Enable AVX512 memory broadcast for FMSUBH.J. Lu5-58/+153
2018-10-21i386: Update FP add/sub with AVX512 memory broadcastH.J. Lu1-5/+5
2018-10-21i386: Enable AVX512 memory broadcast for FP mulH.J. Lu1-0/+12
2018-10-21i386: Add missing AVX512VL or/xor intrinsicsH.J. Lu1-0/+48
2018-10-20i386: Enable AVX512 memory broadcast for FP divH.J. Lu1-0/+12
2018-10-19rs6000: Put CR0 first in REG_ALLOC_ORDERSegher Boessenkool1-1/+1
2018-10-19re PR tree-optimization/87657 (SLP ICE in libgfortran matmul_i2_vanilla)Richard Biener1-2/+1
2018-10-19i386: Enable AVX512 memory broadcast for FP addH.J. Lu1-0/+28
2018-10-19i386: Use register_operand in AVX512 FMA with memory broadcastH.J. Lu1-6/+6
2018-10-18i386: Enable AVX512 memory broadcast for FMAH.J. Lu1-0/+50
2018-10-18i386.c (ix86_emit_fp_unordered_jump): Set JUMP_LABEL to the jump insn.Uros Bizjak1-18/+28
2018-10-18i386.c (ix86_builtin_vectorization_cost): Do not feed width-specific load/sto...Richard Biener2-34/+28
2018-10-18i386.c: Fix costing of vector FMA.Richard Biener1-1/+2
2018-10-18i386.c (ix86_vec_cost): Remove !parallel path and argument.Richard Biener1-69/+45
2018-10-18Add -std=c2x, -std=gnu2x, -Wc11-c2x-compat, C2X _Static_assert support.Joseph Myers1-0/+1
2018-10-16[AArch64] Use @ pattern to eliminate switch statement in one more placeKyrylo Tkachov2-21/+2
2018-10-15ft32.md (ft32_general_movsrc_operand): Disable reg + sym +- const_int address...Jeff Law1-1/+6
2018-10-15S/390: Fix problem with vec_init expanderAndreas Krebbel1-3/+8
2018-10-14i386: Add register source to movddupH.J. Lu1-1/+1
2018-10-12pdp11.md (doloop_end): New expander.Paul Koning2-2/+87
2018-10-12introduce --enable-large-address-awareAlexandre Oliva2-0/+17
2018-10-12define HAVE_GAS_ALIGNED_COMMAlexandre Oliva1-0/+4
2018-10-12[AArch64] Support zero-extended move to FP registerWilco Dijkstra1-11/+20
2018-10-11rs6000.c (map_to_integral_tree_type): New helper function.Will Schmidt1-125/+180
2018-10-11[AArch64] Fix PR87511Wilco Dijkstra1-1/+2
2018-10-11leverage linker relaxation on ppc vxworks RTPsDoug Rupp1-1/+8
2018-10-11x86-tune-costs.h (bdver?_memcpy, [...]): Unify to ...Richard Biener2-316/+10
2018-10-10re PR target/87573 (error: could not split insn since r264877)Uros Bizjak1-1/+8
2018-10-10re PR target/87550 (Intrinsics for rdpmc (__rdpmc, __builtin_ia32_rdpmc) are ...Jakub Jelinek1-1/+1
2018-10-10sse.md (reduc_plus_scal_v8df, [...]): Merge into pattern reducing to half wid...Richard Biener1-87/+63
2018-10-09This is a follow-on to earlier commits for adding compatibility implementatio...Paul A. Clarke1-0/+162
2018-10-08i386: Correct _mm512_mask3_fmaddsub_round_pdH.J. Lu1-1/+1
2018-10-08x86-tune-costs.h (znver1_cost): Make AVX256 vector loads cost the same as AVX...Richard Biener1-2/+2
2018-10-08Fix ICE on block move when using LRA.Paul Koning4-190/+41
generated by cgit v1.1 at 2024-07-18 12:21:56 +0000