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2016-12-14Split omp-low into multiple filesMartin Jambor1-3/+4
2016-12-14re PR target/78791 (ACATS cxf2001 failure)Jakub Jelinek2-2/+3
2016-12-14re PR target/59874 (Missing builtin (__builtin_clzs) when compiling with g++)Uros Bizjak3-2/+49
2016-12-14rs6000.c (rs6000_split_vec_extract_var): On ISA 3.0/power9, add support to us...Michael Meissner6-43/+380
2016-12-13rs600.c (rs6000_builtin_vectorization_cost): Adjust unaligned load cost.Bill Schmidt1-0/+3
2016-12-13re PR target/78794 (We noticed ~9% regression in 32-bit mode for 462.libquntu...Uros Bizjak1-1/+6
2016-12-13rs6000-c.c: Add built-in support for vector float vec_pack (vector double...Carl Love3-0/+6
2016-12-12re PR target/78738 (ICE in extract_insn, at recog.c:2311)Uros Bizjak1-3/+6
2016-12-12Define arm_arch_core_flags in a single fileThomas Preud'homme1-20/+0
2016-12-12constraints.md (T): Use special memory constraint.Eric Botcazou2-13/+14
2016-12-11nios2.c (nios2_emit_move_sequence): Call copy_rtx to avoid shared structure e...Sandra Loosemore1-1/+2
2016-12-11re PR target/78695 (ICE (segfault) on powerpc64le-linux-gnu)Bill Schmidt1-0/+6
2016-12-11[Darwin, PPC] Fix PR71496 by marking pic base loads as non-copyable.Iain Sandoe1-0/+4
2016-12-11pa.c (pa_callee_copies): New function.John David Anglin2-1/+22
2016-12-11re PR target/70799 (STV pass does not convert DImode shifts)Uros Bizjak1-4/+6
2016-12-11x86-64.h: Append --32 to the assembler options when -m16 is used on non-glibc...Roger Pau Monné1-1/+1
2016-12-11re PR target/70118 (UBSan claims misaligned access in SSE instrinsics)Allan Sandfeld Jensen2-4/+7
2016-12-09rs6000-passes.def: New file.Bill Schmidt4-9/+40
2016-12-09re PR target/72742 (ICE in extract_insn, at recog.c:2309 (error: unrecognizab...Jakub Jelinek1-2/+4
2016-12-09rs6000: clz/ctz/ffs improvement (PR78683)Segher Boessenkool2-35/+38
2016-12-08This patch fixes an issue in aarch64_classify_address.Wilco Dijkstra1-1/+4
2016-12-08i386.h (HARD_REGNO_NREGS): Use GENERAL_REGNO_P.Uros Bizjak1-11/+8
2016-12-08aarch64.c (aarch64_load_symref_appropriately): Handle SYMBOL_SMALL_TLSGD for ...Naveen H.S2-6/+10
2016-12-08aarch64.c (aarch64_load_symref_appropriately): Access the lower part of RTX a...Andrew Pinski1-1/+2
2016-12-07re PR target/72717 (ICE: in emit_move_insn, at expr.c:3693 with vector shift ...Michael Meissner1-10/+28
2016-12-07Improve TI mode address offsets - these may either use LDP of 64-bit or LDR o...Wilco Dijkstra2-17/+19
2016-12-07[Patch PR78561 PowerPC] Revert to old behaviour for counting constant poolsJames Greenhalgh1-7/+7
2016-12-072016-12-07 Naveen H.S <Naveen.Hurugalawadi@cavium.com>Naveen H.S1-0/+39
2016-12-07Fix x86_64-ism in selftest (PR bootstrap/78705)David Malcolm1-6/+8
2016-12-06re PR target/78658 (powerpc64le: ICE with -mcpu=power9 -Og)Michael Meissner1-7/+14
2016-12-06print_rtx: implement support for reuse IDs (v2)David Malcolm1-0/+24
2016-12-06predicates.md (general_gr_operand): New predicate.Uros Bizjak3-49/+26
2016-12-06[ARM][committed] Sort ARMv8 processors by alphabetic orderKyrylo Tkachov3-11/+11
2016-12-06[MIPS][MSA] Fix builtins with literal integer arguments.Robert Suchanek1-22/+61
2016-12-062016-12-06 Tamar Christina <tamar.christina@arm.com>Tamar Christina1-0/+197
2016-12-06re PR target/78688 (PowerPC fails bootstrap)Michael Meissner1-5/+5
2016-12-05Add AVX512 k-mask intrinsicsAndrew Senkevich6-1/+214
2016-12-05[ARC] Fix PIE.Cupertino Miranda1-6/+4
2016-12-05[ARC] Remove unused patterns, refactor unspec+offset pattern gen.Claudiu Zissulescu4-59/+19
2016-12-05Fix arm-netbsdelf bootstrap.Andre Vieira1-1/+2
2016-12-05sparc-protos.h (sparc_splitdi_legitimate): Rename to...Eric Botcazou3-255/+215
2016-12-04re PR target/70322 (STV doesn't optimize andn)Uros Bizjak1-2/+13
2016-12-03constraints.md (U): Adjust comment.Eric Botcazou2-29/+44
2016-12-02arm.c (arm_handle_cmse_nonsecure_call): Remove unused variable main_variant.Jeff Law1-1/+1
2016-12-02re PR target/78639 (Power9 bad code generation for cactusADM benchmark)Michael Meissner1-1/+1
2016-12-02re PR target/70322 (STV doesn't optimize andn)Uros Bizjak1-12/+39
2016-12-02[AArch64] Separate shrink wrapping hooks implementationKyrylo Tkachov3-24/+275
2016-12-02alpha.md (exception_receiver): Copy alpha_gp_ave_rtx return value.Uros Bizjak1-1/+1
2016-12-02Makefile.in (PREPROCESSOR_DEFINES): Add a level of indirection for several in...Tadek Kijkowski2-0/+38
2016-12-02re PR target/70322 (STV doesn't optimize andn)Jakub Jelinek2-3/+30
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