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| author | Michael Meissner <meissner@linux.vnet.ibm.com> | 2016-12-07 23:52:05 +0000 |
|---|---|---|
| committer | Michael Meissner <meissner@gcc.gnu.org> | 2016-12-07 23:52:05 +0000 |
| commit | fc3f36f9a1642338da8c0428ea5dc140402556c9 (patch) | |
| tree | 5df0a140dbb666b91c6d6bb15e3c306fe514afab /gcc/config | |
| parent | 18697a1de7710088982537008b244a80361cc4e0 (diff) | |
| download | gcc-fc3f36f9a1642338da8c0428ea5dc140402556c9.zip gcc-fc3f36f9a1642338da8c0428ea5dc140402556c9.tar.gz gcc-fc3f36f9a1642338da8c0428ea5dc140402556c9.tar.bz2 | |
re PR target/72717 (ICE: in emit_move_insn, at expr.c:3693 with vector shift @ powerpc64le)
[gcc]
2016-12-07 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/72717
* config/rs6000/rs6000.c (rs6000_expand_vector_init): If the
V2DImode elements are SUBREG's convert the result into DImode
rather than failing in emit_move_insn.
[gcc/testsuite]
2016-12-07 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/72717
* gcc.target/powerpc/pr72717.c: New test.
From-SVN: r243418
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/rs6000/rs6000.c | 38 |
1 files changed, 28 insertions, 10 deletions
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index b75a290..f0c1354 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -6891,25 +6891,43 @@ rs6000_expand_vector_init (rtx target, rtx vals) /* Double word values on VSX can use xxpermdi or lxvdsx. */ if (VECTOR_MEM_VSX_P (mode) && (mode == V2DFmode || mode == V2DImode)) { - rtx op0 = XVECEXP (vals, 0, 0); - rtx op1 = XVECEXP (vals, 0, 1); + rtx op[2]; + size_t i; + size_t num_elements = all_same ? 1 : 2; + for (i = 0; i < num_elements; i++) + { + op[i] = XVECEXP (vals, 0, i); + /* Just in case there is a SUBREG with a smaller mode, do a + conversion. */ + if (GET_MODE (op[i]) != inner_mode) + { + rtx tmp = gen_reg_rtx (inner_mode); + convert_move (tmp, op[i], 0); + op[i] = tmp; + } + /* Allow load with splat double word. */ + else if (MEM_P (op[i])) + { + if (!all_same) + op[i] = force_reg (inner_mode, op[i]); + } + else if (!REG_P (op[i])) + op[i] = force_reg (inner_mode, op[i]); + } + if (all_same) { - if (!MEM_P (op0) && !REG_P (op0)) - op0 = force_reg (inner_mode, op0); if (mode == V2DFmode) - emit_insn (gen_vsx_splat_v2df (target, op0)); + emit_insn (gen_vsx_splat_v2df (target, op[0])); else - emit_insn (gen_vsx_splat_v2di (target, op0)); + emit_insn (gen_vsx_splat_v2di (target, op[0])); } else { - op0 = force_reg (inner_mode, op0); - op1 = force_reg (inner_mode, op1); if (mode == V2DFmode) - emit_insn (gen_vsx_concat_v2df (target, op0, op1)); + emit_insn (gen_vsx_concat_v2df (target, op[0], op[1])); else - emit_insn (gen_vsx_concat_v2di (target, op0, op1)); + emit_insn (gen_vsx_concat_v2di (target, op[0], op[1])); } return; } |