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2023-11-30AArch64: Fix __sync_val_compare_and_swap [PR111404]Wilco Dijkstra1-1/+28
2023-11-30AArch64: Fix strict-align cpymem/setmem [PR103100]Wilco Dijkstra1-30/+22
2023-11-30aarch64: Add support for Ampere-1B (-mcpu=ampere1b) CPUPhilipp Tomsich1-0/+1
2023-11-27aarch64: Improve cost of `a ? {-,}1 : b`Andrew Pinski1-0/+12
2023-11-27aarch64: Do not force a stack frame for EH returnsSzabolcs Nagy1-2/+1
2023-11-27aarch64: Use br instead of ret for eh_returnSzabolcs Nagy1-58/+24
2023-11-21AArch64: only emit mismatch error when features would be disabled.Tamar Christina1-5/+15
2023-11-21AArch64: Add new generic-armv9-a CPU and make it the default for Armv9Tamar Christina1-0/+1
2023-11-21AArch64: Add new generic-armv8-a CPU and make it the default.Tamar Christina1-0/+1
2023-11-21AArch64: Remove special handling of generic cpu.Tamar Christina1-2/+0
2023-11-21AArch64: Refactor costs models to different files.Tamar Christina1-2399/+24
2023-11-21AArch64: only discount MLA for vector and scalar statementsTamar Christina1-9/+12
2023-11-09AArch64: Add special patterns for creating DI scalar and vector constant 1 <<...Tamar Christina1-3/+48
2023-11-07aarch64: Add a %Z operand modifier for SVE registersRichard Sandiford1-0/+6
2023-11-05aarch64: Rework aarch64_modes_tieable_p [PR112105]Richard Sandiford1-109/+114
2023-10-27aarch64: Add basic target_print_operand support for CONST_STRINGVictor Do Nascimento1-0/+5
2023-10-25AArch64: Improve immediate generationWilco Dijkstra1-0/+20
2023-10-24aarch64: Define TARGET_INSN_COSTRichard Sandiford1-0/+25
2023-10-18aarch64: Replace duplicated selftestsAndrew Carlotti1-12/+12
2023-10-17aarch64: Put LR save slot first in more casesRichard Sandiford1-1/+1
2023-10-17aarch64: Use vecs to store register save orderRichard Sandiford1-101/+102
2023-09-29Remove poly_int_podRichard Sandiford1-1/+1
2023-09-29aarch64: Improve on ldp-stp policies code structure.Manos Anagnostakis1-103/+57
2023-09-28AArch64: Fix memmove operand corruption [PR111121]Wilco Dijkstra1-6/+9
2023-09-27aarch64: Fine-grained policies to control ldp-stp formationManos Anagnostakis1-57/+155
2023-09-18AArch64: Improve immediate expansion [PR105928]Wilco Dijkstra1-11/+32
2023-09-15aarch64: Fix loose ldpstp check [PR111411]Richard Sandiford1-5/+3
2023-09-14aarch64: Restore SVE WHILE costingRichard Sandiford1-17/+19
2023-09-12aarch64: Make stack smash canary protect saved registersRichard Sandiford1-6/+40
2023-09-12aarch64: Remove below_hard_fp_saved_regs_sizeRichard Sandiford1-24/+21
2023-09-12aarch64: Explicitly record probe registers in frame infoRichard Sandiford1-14/+54
2023-09-12aarch64: Simplify probe of final frame allocationRichard Sandiford1-8/+4
2023-09-12aarch64: Put LR save probe in first 16 bytesRichard Sandiford1-42/+30
2023-09-12aarch64: Tweak stack clash boundary conditionRichard Sandiford1-1/+3
2023-09-12aarch64: Minor initial adjustment tweakRichard Sandiford1-3/+2
2023-09-12aarch64: Simplify top of frame allocationRichard Sandiford1-15/+8
2023-09-12aarch64: Measure reg_offset from the bottom of the frameRichard Sandiford1-29/+24
2023-09-12aarch64: Rename hard_fp_offset to bytes_above_hard_fpRichard Sandiford1-13/+13
2023-09-12aarch64: Rename locals_offset to bytes_above_localsRichard Sandiford1-3/+3
2023-09-12aarch64: Only calculate chain_offset if there is a chainRichard Sandiford1-5/+5
2023-09-12aarch64: Tweak aarch64_save/restore_callee_savesRichard Sandiford1-28/+28
2023-09-12aarch64: Add bytes_below_hard_fp to frame infoRichard Sandiford1-3/+3
2023-09-12aarch64: Add bytes_below_saved_regs to frame infoRichard Sandiford1-35/+36
2023-09-12aarch64: Explicitly handle frames with no saved registersRichard Sandiford1-3/+5
2023-09-12aarch64: Avoid a use of callee_offsetRichard Sandiford1-3/+1
2023-09-12aarch64: Use local frame vars in shrink-wrapping codeRichard Sandiford1-59/+64
2023-08-24aarch64: Account for different Advanced SIMD fusing optionsRichard Sandiford1-6/+18
2023-08-23rtl: use rtx_code for gen_ccmp_first and gen_ccmp_nextRichard Earnshaw1-2/+3
2023-08-09targhooks: Extend legitimate_address_p with code_helper [PR110248]Kewen Lin1-1/+2
2023-08-04AArch64: update costing for combining vector conditionalsTamar Christina1-2/+57