diff options
| author | Richard Earnshaw <rearnsha@arm.com> | 2023-08-22 15:26:59 +0100 |
|---|---|---|
| committer | Richard Earnshaw <rearnsha@arm.com> | 2023-08-23 17:13:29 +0100 |
| commit | bf64392d66f2913d2bbd1d3232f7f8a77c812d13 (patch) | |
| tree | 3116961c25cdd2824299cc6ec401064a612fd485 /gcc/config/aarch64/aarch64.cc | |
| parent | 3e086a12c273e5abb45d0228dc624acf97871ef3 (diff) | |
| download | gcc-bf64392d66f2913d2bbd1d3232f7f8a77c812d13.zip gcc-bf64392d66f2913d2bbd1d3232f7f8a77c812d13.tar.gz gcc-bf64392d66f2913d2bbd1d3232f7f8a77c812d13.tar.bz2 | |
rtl: use rtx_code for gen_ccmp_first and gen_ccmp_next
Now that we have a forward declaration of rtx_code in coretypes.h, we
can adjust these hooks to take rtx_code arguments rather than an int.
gcc/ChangeLog:
* target.def (gen_ccmp_first, gen_ccmp_next): Use rtx_code for
CODE, CMP_CODE and BIT_CODE arguments.
* config/aarch64/aarch64.cc (aarch64_gen_ccmp_first): Likewise.
(aarch64_gen_ccmp_next): Likewise.
* doc/tm.texi: Regenerated.
Diffstat (limited to 'gcc/config/aarch64/aarch64.cc')
| -rw-r--r-- | gcc/config/aarch64/aarch64.cc | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc index eba5d4a..0346281 100644 --- a/gcc/config/aarch64/aarch64.cc +++ b/gcc/config/aarch64/aarch64.cc @@ -25666,7 +25666,7 @@ aarch64_asan_shadow_offset (void) static rtx aarch64_gen_ccmp_first (rtx_insn **prep_seq, rtx_insn **gen_seq, - int code, tree treeop0, tree treeop1) + rtx_code code, tree treeop0, tree treeop1) { machine_mode op_mode, cmp_mode, cc_mode = CCmode; rtx op0, op1; @@ -25740,7 +25740,8 @@ aarch64_gen_ccmp_first (rtx_insn **prep_seq, rtx_insn **gen_seq, static rtx aarch64_gen_ccmp_next (rtx_insn **prep_seq, rtx_insn **gen_seq, rtx prev, - int cmp_code, tree treeop0, tree treeop1, int bit_code) + rtx_code cmp_code, tree treeop0, tree treeop1, + rtx_code bit_code) { rtx op0, op1, target; machine_mode op_mode, cmp_mode, cc_mode = CCmode; |