| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2020-08-03 | op: hyperviosr: fix exception code and name | Chih-Min Chao | 1 | -1/+1 |
| 2020-07-08 | Extend trap classes to pass more information | Anup Patel | 1 | -5/+37 |
| 2020-03-20 | ebreak should write mtval with 0, not pc | Andrew Waterman | 1 | -1/+1 |
| 2017-11-27 | Rename badaddr to tval | Andrew Waterman | 1 | -8/+8 |
| 2017-11-27 | Set tval to 0 on traps with no specified tval | Andrew Waterman | 1 | -1/+1 |
| 2017-03-27 | Set badaddr=0 on illegal instruction traps | Andrew Waterman | 1 | -1/+1 |
| 2017-03-27 | On EBREAK, set badaddr to pc | Andrew Waterman | 1 | -1/+1 |
| 2017-03-27 | Separate page faults from physical memory access exceptions | Andrew Waterman | 1 | -3/+6 |
| 2016-03-02 | WIP on priv spec v1.9 | Andrew Waterman | 1 | -7/+9 |
| 2015-05-09 | Upgrade to privileged architecture 1.7 | Andrew Waterman | 1 | -2/+5 |
| 2015-03-17 | Merge [shm]call into ecall, [shm]ret into eret | Andrew Waterman | 1 | -4/+2 |
| 2015-03-12 | Use hcall instead of mcall | Andrew Waterman | 1 | -0/+1 |
| 2015-03-12 | Update to new privileged spec | Andrew Waterman | 1 | -4/+2 |
| 2014-12-04 | Set badvaddr on instruction page faults | Andrew Waterman | 1 | -2/+2 |
| 2014-08-25 | clean up warnings from clang | Scott Beamer | 1 | -1/+1 |
| 2014-01-21 | Use auto-generated trap cause numbers | Andrew Waterman | 1 | -13/+12 |
| 2013-11-05 | correctly trap when SR_EA is disabled | Yunsup Lee | 1 | -0/+1 |
| 2013-10-17 | add hwacha exception support | Yunsup Lee | 1 | -3/+1 |
| 2013-08-11 | Instructions are no longer member functions | Andrew Waterman | 1 | -26/+49 |
| 2013-03-25 | add BSD license | Andrew Waterman | 1 | -0/+2 |
| 2012-03-24 | new supervisor mode | Andrew Waterman | 1 | -8/+1 |
| 2011-11-11 | Changed supervisor mode | Andrew Waterman | 1 | -11/+9 |
| 2011-06-19 | temporary undoing of renaming | Andrew Waterman | 1 | -0/+44 |
| 2011-06-12 | [sim] renamed to riscv-isa-run | Andrew Waterman | 1 | -43/+0 |
| 2011-05-28 | [fesvr,xcc,sim] fixed multicore sim for akaros | Andrew Waterman | 1 | -0/+2 |
| 2011-05-18 | [opcodes,pk,sim] add more vector traps (for #banks, illegal instructions) | Yunsup Lee | 1 | -3/+3 |
| 2011-04-12 | [sim,pk] fixed minor pk bugs and trap codes | Andrew Waterman | 1 | -1/+2 |
| 2011-04-09 | [sim] add vector traps to vector instructions | Yunsup Lee | 1 | -1/+1 |
| 2011-04-09 | [sim,pk] reorganized status register | Andrew Waterman | 1 | -1/+1 |
| 2011-03-25 | [xcc,pk,opcodes,sim] updated encoding/insn names | Andrew Waterman | 1 | -1/+2 |
| 2011-02-04 | [sim,pk] added interrupt-pending field to cause reg | Andrew Waterman | 1 | -1/+1 |
| 2010-09-10 | [sim, pk] cleaned up exception vectors and FP exc flags | Andrew Waterman | 1 | -5/+5 |
| 2010-08-04 | [xcc,pk,sim] Added first part of FP support | Andrew Waterman | 1 | -0/+8 |
| 2010-07-18 | Reorganized directory structure | Andrew Waterman | 1 | -0/+31 |
