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:
rocket-tools/riscv-isa-sim.git
confprec
cs250
cycleh
debug_rom
debug_rom_fence
device_flags
dtm_reset_error
dts_parsing
dynamic
eos18-bringup
factor-out-macros
fix-bf16
force-rtti
fp-encoding
heterogeneous_mc
hwachav4
increase-stack-size
itrigger-etrigger-cleanup
load_reservation_set_size
log-commits-faster
master
mmio-hack
mvp
no_progbuf
no_progbuf2
nolibfdt
p-ext-0.5.2
plctlab-plct-zce-fix2
plic-clint-endian
plic_uart_v1
priv-1.10
private-l1-caches
pte-info-and-delegation
remove-tests
rivosinc-etrigger_fix_exception_match
rva-profile-support
simplify-misaligned
sodor
sparse-mem
speedup-hacks
static-link
test
tmp
trigger_priority
tweak_debug_rom
whole-archive
sifive/rvv0.9-phase2
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riscv
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riscv.ac
Age
Commit message (
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Author
Files
Lines
2023-12-13
build: fix broken configure
phantom1003
1
-1
/
+1
2023-03-27
Add zicntr_zihpm to DEFAULT_ISA
Jerry Zhao
1
-2
/
+2
2023-01-04
Remove --enable-dirty compile option
Jerry Zhao
1
-5
/
+0
2023-01-03
Delete --enable-misaligned configure option
Andrew Waterman
1
-5
/
+0
2022-12-21
Remove --enable-histogram option
Andrew Waterman
1
-5
/
+0
2022-12-20
Always build with commit logging support
Jerry Zhao
1
-5
/
+0
2021-09-30
Remove vestiges of legacy RVV SLEN parameter
Andrew Waterman
1
-2
/
+2
2021-08-23
configure option --with-target (#776)
emelcher
1
-0
/
+5
2021-08-03
configure for boost lib
emelcher
1
-0
/
+8
2020-12-01
Remove stray comma in configure
Andrew Waterman
1
-1
/
+1
2020-11-07
Implement support for big-endian targets
Marcus Comstedt
1
-0
/
+5
2020-09-22
Separate build of spike and spike-dasm
Andrew Waterman
1
-1
/
+4
2020-09-22
Don't error out if dlopen isn't available
Andrew Waterman
1
-3
/
+1
2020-06-10
build: fix quota string parameter
Chih-Min Chao
1
-1
/
+1
2020-03-09
rvv: enhance --varch to parse string type options
Zhen Wei
1
-2
/
+2
2020-02-12
Improve --varch error checking. (#394)
Tim Newsome
1
-2
/
+2
2019-11-12
Add --priv option to control which privilege modes are available
Andrew Waterman
1
-0
/
+6
2019-06-14
rvv: add configuration and command-line option
Chih-Min Chao
1
-0
/
+7
2019-03-31
Add fesvr; only globally install fesvr headers/libs
static-link
Andrew Waterman
1
-11
/
+0
2017-04-05
Add --enable-misaligned option for misaligned ld/st support
Andrew Waterman
1
-0
/
+5
2017-02-18
Make HW setting of PTE A/D bits optional (by configure arg)
Andrew Waterman
1
-0
/
+5
2016-04-02
Allow configuration of default ISA with --with-isa
Andrew Waterman
1
-0
/
+6
2015-04-03
Support setting ISA/subsets with --isa flag
Andrew Waterman
1
-15
/
+4
2015-03-30
Implement RVC draft
Andrew Waterman
1
-0
/
+5
2015-01-09
Fix bug where C compiler used instead of C++ for autoconf tests
Stephen Twigg
1
-0
/
+2
2014-09-20
Update riscv.ac to set CPPFLAGS with fesvr include path
Arun Thomas
1
-1
/
+1
2014-08-15
Added PC histogram option.
Christopher Celio
1
-0
/
+5
2014-01-26
Enable runtime loading of dynamic library with --extlib
Andrew Waterman
1
-2
/
+0
2014-01-24
Require libdl for dynamic linking at runtime
Andrew Waterman
1
-0
/
+2
2014-01-24
Build and use shared libraries only
Andrew Waterman
1
-2
/
+2
2014-01-24
Build and use shared libraries
Andrew Waterman
1
-2
/
+2
2013-09-27
Added commit logging (--enable-commitlog). Also fixed disasm bug.
Christopher Celio
1
-0
/
+5
2013-07-26
Remove more vector stuff
Andrew Waterman
1
-10
/
+0
2013-01-25
change htif to link against libfesvr
Andrew Waterman
1
-2
/
+13
2011-11-11
Remove dependence on binutils
Your Name
1
-16
/
+0
2011-11-11
Use new compiler toolchain's disassembler
Andrew Waterman
1
-1
/
+1
2011-07-08
bugfix to riscv.ac
Rimas Avizienis
1
-2
/
+2
2011-07-08
fixes to make disassembly work under macos (with macports binutils installed)
Rimas Avizienis
1
-1
/
+6
2011-06-19
temporary undoing of renaming
Andrew Waterman
1
-0
/
+32
2011-06-12
[sim] renamed to riscv-isa-run
Andrew Waterman
1
-37
/
+0
2011-06-11
[xcc] fix configure scripts
Andrew Waterman
1
-3
/
+3
2011-04-15
[sim] added icache simulator (disabled by default)
Andrew Waterman
1
-0
/
+5
2011-04-09
[sim] add disable option for vector
Yunsup Lee
1
-0
/
+5
2011-04-09
[sim,pk] reorganized status register
Andrew Waterman
1
-0
/
+5
2010-10-15
[pk, sim] added FPU emulation support to proxy kernel
Andrew Waterman
1
-0
/
+10
2010-07-18
Reorganized directory structure
Andrew Waterman
1
-0
/
+12