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author | Andrew Waterman <andrew@sifive.com> | 2020-09-22 04:28:22 -0700 |
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committer | Andrew Waterman <andrew@sifive.com> | 2020-09-22 04:28:22 -0700 |
commit | 59d450e58646bdc0af5e9250df7d6267c3c791fc (patch) | |
tree | 02a111a8dde57f54d95edda9cb9b3ee532ecef7b /riscv/riscv.ac | |
parent | b1dc3826d0254b5d4853037cd399560b39745983 (diff) | |
download | riscv-isa-sim-59d450e58646bdc0af5e9250df7d6267c3c791fc.zip riscv-isa-sim-59d450e58646bdc0af5e9250df7d6267c3c791fc.tar.gz riscv-isa-sim-59d450e58646bdc0af5e9250df7d6267c3c791fc.tar.bz2 |
Separate build of spike and spike-dasm
Diffstat (limited to 'riscv/riscv.ac')
-rw-r--r-- | riscv/riscv.ac | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/riscv/riscv.ac b/riscv/riscv.ac index 624e981..64693e9 100644 --- a/riscv/riscv.ac +++ b/riscv/riscv.ac @@ -19,7 +19,10 @@ AC_ARG_WITH(varch, AC_DEFINE_UNQUOTED([DEFAULT_VARCH], ["vlen:128,elen:64,slen:128"], [Default value for --varch switch])) -AC_SEARCH_LIBS([dlopen], [dl dld], AC_DEFINE([HAVE_DLOPEN], [], [Dynamic library loading is supported])) +AC_SEARCH_LIBS([dlopen], [dl dld], [ + AC_DEFINE([HAVE_DLOPEN], [], [Dynamic library loading is supported]), + AC_SUBST([HAVE_DLOPEN], [yes]) +]) AC_CHECK_LIB(pthread, pthread_create, [], [AC_MSG_ERROR([libpthread is required])]) |