| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2011-02-01 | [xcc,opcodes,pk,sim] cleanup to FP ISA | Andrew Waterman | 1 | -18/+0 |
| 2011-01-18 | [opcodes, sim, xcc] made *w insns illegal in RV32 | Andrew Waterman | 1 | -1/+1 |
| 2010-11-21 | [pk] various PK cleanups/speedups | Andrew Waterman | 1 | -0/+1 |
| 2010-11-21 | [xcc, sim, pk, opcodes] new instruction encoding! | Andrew Waterman | 1 | -1/+1 |
| 2010-10-26 | [sim] removed unnecessary trap in mfcr instruction | Andrew Waterman | 1 | -3/+0 |
| 2010-10-26 | [pk,sim,xcc] get rid of at register, introduce tp register | Yunsup Lee | 1 | -2/+1 |
| 2010-09-20 | [xcc, sim] changed instruction format so imm12 subs for rs2 | Andrew Waterman | 1 | -2/+2 |
| 2010-09-09 | [pk, sim] added interrupt support to sim; added timer interrupt | Andrew Waterman | 1 | -0/+4 |
| 2010-09-06 | [sim, xcc] bthread threading model exposed; insn encoding cleaned up | Andrew Waterman | 1 | -0/+17 |
