| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2024-06-13 | Adding Zilsd and Zcmlsd extensions (Load/store pair for RV32) | Christian Herber | 1 | -2/+8 |
| 2022-10-19 | Template-ize loads | Andrew Waterman | 1 | -1/+1 |
| 2015-03-12 | Update to new privileged spec | Andrew Waterman | 1 | -1/+1 |
| 2013-09-27 | Use WRITE_RD/WRITE_FRD macros to write registers | Andrew Waterman | 1 | -1/+1 |
| 2013-09-11 | Implement zany immediates | Andrew Waterman | 1 | -1/+1 |
| 2013-08-11 | Instructions are no longer member functions | Andrew Waterman | 1 | -1/+1 |
| 2013-03-25 | truncate effective addresses in rv32 | Andrew Waterman | 1 | -1/+1 |
| 2011-06-19 | temporary undoing of renaming | Andrew Waterman | 1 | -0/+2 |
| 2011-06-12 | [sim] renamed to riscv-isa-run | Andrew Waterman | 1 | -2/+0 |
| 2011-02-15 | [xcc,opcodes,pk,sim] krste's re-renaming spree | Andrew Waterman | 1 | -0/+2 |
| 2011-01-20 | [sim, pk, xcc, opcodes] great instruction renaming of 2011 | Andrew Waterman | 1 | -2/+0 |
| 2011-01-18 | [opcodes, sim, xcc] made *w insns illegal in RV32 | Andrew Waterman | 1 | -1/+1 |
| 2010-11-21 | [xcc, sim, pk, opcodes] new instruction encoding! | Andrew Waterman | 1 | -1/+1 |
| 2010-09-20 | [xcc, sim] changed instruction format so imm12 subs for rs2 | Andrew Waterman | 1 | -1/+1 |
| 2010-07-28 | [sim,xcc] Changed instruction format to RISC-V | Andrew Waterman | 1 | -1/+1 |
| 2010-07-18 | Reorganized directory structure | Andrew Waterman | 1 | -0/+2 |
