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2 daysMerge pull request #1700 from ved-rivos/ssdbltrpHEADmasterAndrew Waterman10-16/+93
Add Ssdbltrp
5 daysAdd SsdbltrpVed Shanbhogue10-16/+93
7 daysMerge pull request #1717 from riscv-software-src/fix-ss-loadAndrew Waterman1-1/+1
Loads to shadow-stack pages are allowed
8 daysMerge pull request #1719 from YenHaoChen/pr-encodingAndrew Waterman2-155/+114
Bump encoding.h for dcsr in debug spec 1.0
9 daysLoads to shadow-stack pages are allowedAndrew Waterman1-1/+1
9 daysUpdate encoding.h for pointer maskingYenHaoChen2-155/+114
Rename DCSR_STOPCYCLE to DCSR_STOPCOUNT Rename DCSR_HALT to DCSR_NMIP
12 daysMerge pull request #1714 from abejgonzalez/fix-interactive-insnJerry Zhao1-29/+30
Fix insn interactive command (catch/print trap, use proper access func)
12 daysMerge pull request #1715 from abejgonzalez/fix-interactive-vregsJerry Zhao1-29/+34
Don't print vregs in interactive mode if no V extension exists
13 daysDon't print vregs if no V extsabejgonzalez1-29/+34
13 daysFix insn interactive command (catch/print trap, use proper access func)abejgonzalez1-29/+30
2024-06-26Merge pull request #1709 from abejgonzalez/add-insn-debug-mode-cmdsAndrew Waterman2-19/+57
Add insn cmd to interactive debug mode
2024-06-26Add insn cmds to interactive debug modeabejgonzalez2-19/+57
2024-06-26Merge pull request #1711 from riscv-software-src/zfa-disasmAndrew Waterman1-1/+105
Add disassembly for Zfa extension
2024-06-26Expand default disassembly ISAAndrew Waterman1-1/+2
2024-06-26Add disassembly for Zfa extensionAndrew Waterman1-0/+103
2024-06-26Merge pull request #1710 from riscv-software-src/fix_debug_ciJerry Zhao1-1/+1
Fix riscv-tests commit for CI
2024-06-26Fix riscv-tests commit for CIJerry Zhao1-1/+1
* https://github.com/riscv-software-src/riscv-tests/pull/567 was merged by squash accidentally, so the reference commit was lost
2024-06-22Merge pull request #1705 from rpsene/masterJerry Zhao1-0/+1
2024-06-22Fix: Add missing <stdexcept> header for std::logic_errorRafael Sene1-0/+1
- Included <stdexcept> in isa_parser.cc to resolve compilation error due to missing type 'std::logic_error'. Signed-off-by: Rafael Sene <rafael@riscv.org>
2024-06-21Merge pull request #1701 from riscv-software-src/zvl_zveJerry Zhao15-119/+93
Correctly determine vector capability from v/zve/zvl ISA strings, remove --varch
2024-06-21Merge pull request #1704 from riscv-software-src/thread-local-againAndrew Waterman1-2/+1
Fix C/C++ thread-local linkage differently
2024-06-21Fix C/C++ thread-local linkage differentlyAndrew Waterman1-2/+1
Just admit Mac OS is broken, so explicitly special-case it. See #1689 and #1703
2024-06-21Vector-fp instructions depend on zve, not F/DJerry Zhao2-10/+12
2024-06-21Restrict spike to vlen <= 4096Jerry Zhao1-0/+4
2024-06-21Remove all --varch parsingJerry Zhao9-93/+1
2024-06-21Switch to Zvl/Zve parsing from isa_parser, instead of varchJerry Zhao1-1/+4
2024-06-21Disallow any vector, not just V, when no __int128 type is presentJerry Zhao1-1/+1
2024-06-21Relax require_vector check for misa.VJerry Zhao1-2/+0
2024-06-21Relax mstatus.vs dependency on full VJerry Zhao2-1/+5
2024-06-21Relax vector_csr dependency on 'V'Jerry Zhao1-4/+0
2024-06-21Relax zvfh/zvfhmin dependency on V, they only actually depend on ZveJerry Zhao1-3/+0
2024-06-21Allow disassembly from implementations that are not full VJerry Zhao1-1/+1
2024-06-21Relax has_fs dependency on misa.vJerry Zhao1-2/+1
isa_parser should already require any Zvef or Zved extensions imply F/D
2024-06-21Add accessors to isa_parser's VLEN/ELENJerry Zhao1-0/+3
2024-06-21Add Zvl/Zve validation to isa_parserJerry Zhao1-0/+21
2024-06-21Add isa_parser parsing for zvl/zveJerry Zhao2-1/+40
2024-06-20Merge pull request #1702 from riscv-software-src/fix-1696Andrew Waterman1-20/+20
In isa_parser, move extensionology code before error-checking code
2024-06-20In isa_parser, move extensionology code before error-checking codeAndrew Waterman1-20/+20
Resolves #1696
2024-06-20Merge pull request #1695 from riscv-software-src/bf16-opsAndrew Waterman10-4/+443
Add several BF16 ops to SoftFloat
2024-06-20Merge pull request #1690 from riscv-software-src/fix-warningsJerry Zhao2-17/+17
Fix a few compile warnings
2024-06-18Add several BF16 ops to SoftFloatAndrew Waterman10-0/+435
2024-06-17Merge pull request #1694 from Du-Chao/masterAndrew Waterman1-1/+1
Add a prerequisite for building
2024-06-18Add a prerequisite for buildingChao Du1-1/+1
Otherwise, configure will fail with 'Could not find a version of the Boost::Asio library!'
2024-06-17Consistently order BF16 routines in Makefile and softfloat.hAndrew Waterman2-4/+8
2024-06-13Merge pull request #1689 from riscv-software-src/rounding-mode-thread-localAndrew Waterman1-2/+5
Make softfloat's rounding mode thread-local
2024-06-13Make softfloat's rounding mode thread-localAndrew Waterman1-2/+5
This has no effect on Spike itself, but it might matter for anyone who's using Spike as a library in a multithreaded program.
2024-06-13Merge branch 'NXP-zilsd'Andrew Waterman11-17/+83
2024-06-13Adding Zilsd and Zcmlsd extensions (Load/store pair for RV32)Christian Herber11-17/+83
2024-06-12Fix a few compile warningsAndrew Waterman2-17/+17
2024-06-11Merge pull request #1679 from akifejaz/vector-cryptoAndrew Waterman1-0/+10
Updated README with supported Vector Cryptography Extensions