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| author | Jerry Zhao <jerryz123@berkeley.edu> | 2024-06-20 14:25:15 -0700 |
|---|---|---|
| committer | Jerry Zhao <jerryz123@berkeley.edu> | 2024-06-21 10:29:20 -0700 |
| commit | 0f4642ee44ba026bed7bc6f8b0d738de8cc9d948 (patch) | |
| tree | 08d5971dc31e708f7a0832514671609ede17d75a | |
| parent | 9f5df7f4dbef18c8c22d5e9a8bfca48fc50cfdc6 (diff) | |
| download | spike-0f4642ee44ba026bed7bc6f8b0d738de8cc9d948.zip spike-0f4642ee44ba026bed7bc6f8b0d738de8cc9d948.tar.gz spike-0f4642ee44ba026bed7bc6f8b0d738de8cc9d948.tar.bz2 | |
Switch to Zvl/Zve parsing from isa_parser, instead of varch
| -rw-r--r-- | riscv/processor.cc | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/riscv/processor.cc b/riscv/processor.cc index 43f5627..516618d 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -55,7 +55,10 @@ processor_t::processor_t(const isa_parser_t *isa, const cfg_t *cfg, } #endif - parse_varch_string(cfg->varch); + VU.VLEN = isa->get_vlen(); + VU.ELEN = isa->get_elen(); + VU.vlenb = isa->get_vlen() / 8; + VU.vstart_alu = 0; register_base_instructions(); mmu = new mmu_t(sim, cfg->endianness, this); |