aboutsummaryrefslogtreecommitdiff
AgeCommit message (Expand)AuthorFilesLines
3 hoursMerge pull request #1702 from riscv-software-src/fix-1696HEADmasterAndrew Waterman1-20/+20
5 hoursIn isa_parser, move extensionology code before error-checking codeAndrew Waterman1-20/+20
9 hoursMerge pull request #1695 from riscv-software-src/bf16-opsAndrew Waterman10-4/+443
10 hoursMerge pull request #1690 from riscv-software-src/fix-warningsJerry Zhao2-17/+17
2 daysAdd several BF16 ops to SoftFloatAndrew Waterman10-0/+435
3 daysMerge pull request #1694 from Du-Chao/masterAndrew Waterman1-1/+1
3 daysAdd a prerequisite for buildingChao Du1-1/+1
3 daysConsistently order BF16 routines in Makefile and softfloat.hAndrew Waterman2-4/+8
7 daysMerge pull request #1689 from riscv-software-src/rounding-mode-thread-localAndrew Waterman1-2/+5
7 daysMake softfloat's rounding mode thread-localAndrew Waterman1-2/+5
7 daysMerge branch 'NXP-zilsd'Andrew Waterman11-17/+83
7 daysAdding Zilsd and Zcmlsd extensions (Load/store pair for RV32)Christian Herber11-17/+83
8 daysFix a few compile warningsAndrew Waterman2-17/+17
9 daysMerge pull request #1679 from akifejaz/vector-cryptoAndrew Waterman1-0/+10
9 daysMerge branch 'master' into vector-cryptoAkif Ejaz20-139/+199
9 daysMerge pull request #1687 from riscv-software-src/flw-overlapAndrew Waterman13-124/+179
9 daysValidate contents of overlap list in CIAndrew Waterman1-13/+32
9 daysSeparate RV32 and RV64 C instructions into separate filesAndrew Waterman10-33/+31
9 daysImprove hit rate of opcode cache to compensate for not mutating insn listAndrew Waterman2-17/+58
9 daysCompensate for perf loss of not mutating insn list by presorting itAndrew Waterman1-7/+7
9 daysKeep potentially overlapping instructions in order at head of listAndrew Waterman1-20/+32
9 daysPreserve the ordering of the instruction listAndrew Waterman1-22/+2
9 daysAdd comments to overlap listAndrew Waterman1-0/+9
9 daysRefine Zicfiss overlap listAndrew Waterman1-2/+5
9 daysRemove unnecessary instructions from overlap listAndrew Waterman1-11/+0
9 daysAdd missing instructions to MakefileAndrew Waterman1-0/+4
9 daysMerge pull request #1688 from YenHaoChen/pr-tcontrolAndrew Waterman5-1/+9
10 daystriggers: implement tcontrolYenHaoChen5-1/+9
2024-05-31Merge pull request #1684 from riscv-software-src/simplify-zicfilpAndrew Waterman6-14/+11
2024-05-31Avoid checking ELP before every instruction fetchAndrew Waterman6-13/+12
2024-05-31No need to check if Zicfilp is enabled before checking ELPAndrew Waterman1-3/+1
2024-05-29Merge branch 'master' into vector-cryptoAkif Ejaz6-14/+25
2024-05-29corrected the crypto extension versionakifejaz1-10/+10
2024-05-29Merge pull request #1670 from clementleger/dev/cleger/et_dynJerry Zhao6-14/+25
2024-05-29add support to load ET_DYN elfClément Léger6-14/+25
2024-05-27updated README with supported Vector Cryptography Extensionsakifejaz1-0/+10
2024-05-27Merge pull request #1678 from rbuchner-aril/rbuchner/vxsat-writeAndrew Waterman1-0/+2
2024-05-27Require vector extension when attempting vxsat writesrbuchner1-0/+2
2024-05-26Merge pull request #1677 from YenHaoChen/pr-vector-reductionAndrew Waterman1-4/+4
2024-05-26Merge pull request #1675 from chihminchao/cfi-fixAndrew Waterman2-2/+2
2024-05-24vector: Not logging write of reduction instructions when vl = 0YenHaoChen1-4/+4
2024-05-23zicflip: fix [ms]ret behaviorChih-Min Chao2-2/+2
2024-05-22Merge pull request #1257 from YenHaoChen/pr-mcontrol6-hit0-hit1Andrew Waterman3-1223/+1367
2024-05-22triggers: introduce tinfo.versionYenHaoChen1-1/+2
2024-05-22triggers: implement mcontrol6.hitYenHaoChen1-1/+1
2024-05-22triggers: refactor: add typedef enum { ... } hit_t for mcontrol6YenHaoChen2-7/+15
2024-05-22triggers: refactor: move mcontrol_common_t::hit to mcontrol_t::hit and mcontr...YenHaoChen2-2/+12
2024-05-22triggers: refactor: update debug_defines.hYenHaoChen2-1218/+1340
2024-05-21triggers: remove mcontrol6.timing (implement suggested trigger timings)YenHaoChen1-2/+5
2024-05-06Merge pull request #1663 from ved-rivos/zawrsAndrew Waterman6-2/+26
generated by cgit v1.1 at 2024-06-21 04:48:01 +0000