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path: root/llvm/test/CodeGen/AMDGPU/memory_clause.ll
AgeCommit message (Expand)AuthorFilesLines
5 days[DAG] Remove AssertZext if the input is masked (#146052)Pierre van Houtryve1-4/+4
10 days[RFC][NFC][AMDGPU] Remove `-verify-machineinstrs` from `llvm/test/CodeGen/AMD...Shilei Tian1-2/+2
2025-04-18AMDGPU: Mark workitem ID intrinsics with range attribute (#136196)Matt Arsenault1-4/+4
2025-03-18[SeparateConstOffsetFromGEP] Don't set unsound inbounds flag (#130616)Fabian Ritter1-13/+10
2025-03-13AMDGPU: Replace some float undef test uses with poison (#131090)Matt Arsenault1-2/+2
2025-03-12AMDGPU: Replace insertelement poison with insertelement undef (#130896)Matt Arsenault1-2/+2
2024-11-08Reapply "[AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (#...Shilei Tian1-35/+36
2024-11-08Revert "[AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (#1...Shilei Tian1-36/+35
2024-11-08[AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (#112403)Shilei Tian1-35/+36
2024-07-23[AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (#96162)Christudasan Devadasan1-9/+9
2024-07-15Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and fol...Matt Arsenault1-35/+35
2024-07-14Revert "AMDGPU: Move attributor into optimization pipeline (#83131)" and foll...dyung1-35/+35
2024-07-14AMDGPU: Move attributor into optimization pipeline (#83131)Matt Arsenault1-35/+35
2024-07-03[test] Remove immarg parameter attribute from calls (#97432)Jay Foad1-2/+2
2024-02-09[AMDGPU] Don't fix the scavenge slot at offset 0 (#79136)Diana Picus1-12/+12
2024-01-16[AMDGPU,test] Change llc -march= to -mtriple= (#75982)Fangrui Song1-2/+2
2023-11-29[AMDGPU] Folding imm offset in more cases for scratch access (#70634)Ruiling, Song1-12/+6
2023-07-04[AMDGPU] Do not wait for vscnt on function entry and returnJay Foad1-6/+0
2023-03-09Fix VGPR + offset Scratch offset foldingPetar Avramovic1-6/+12
2022-12-19[AMDGPU] Convert some tests to opaque pointers (NFC)Nikita Popov1-79/+78
2022-07-30[AMDGPU] Extend SILoadStoreOptimizer to s_load instructionsCarl Ritson1-35/+30
2022-04-22AMDGPU: Directly implement computeKnownBits for workitem intrinsicsMatt Arsenault1-4/+4
2022-02-11[AMDGPU] Make enable-flat-scratch a subtarget featureSebastian Neubauer1-1/+1
2022-01-26[LSV] Vectorize loads of vectors by turning it into a larger vectorBenjamin Kramer1-22/+14
2021-12-04AMDGPU: Enable fixed function ABI by defaultMatt Arsenault1-2/+2
2021-12-01[AMDGPU] Set most sched model resource's BufferSize to oneAustin Kerbow1-46/+59
2021-11-24[AMDGPU] Only allow implicit WQM in pixel shadersCarl Ritson1-15/+10
2021-09-14[AMDGPU] Switch PostRA sched to MachineSchedJoe Nash1-5/+5
2021-07-14[AMDGPU] Init scratch only if necessarySebastian Neubauer1-12/+0
2021-04-26[AMDGPU] Experiments show that the GCNRegBankReassign pass significantly impactsBaptiste Saleil1-6/+6
2021-02-26AMDGPU: Use kill instruction to hint soft clause live rangesMatt Arsenault1-1/+2
2021-01-12[AMDGPU] Fix failing assert with scratch ST modeSebastian Neubauer1-0/+278
2020-11-16AMDGPU: Select global saddr mode from SGPR pointerMatt Arsenault1-10/+8
2020-10-27[amdgpu] Enable use of AA during codegen.Michael Liao1-28/+16
2020-10-20[AMDGPU] Avoid inserting noops during schedulingAustin Kerbow1-6/+0
2020-09-23Revert "[AMDGPU] Insert waitcnt after returning from call"Sebastian Neubauer1-0/+3
2020-09-23[AMDGPU] Insert waitcnt after returning from callSebastian Neubauer1-3/+0
2020-09-14[AMDGPU] Don't cluster storesJay Foad1-4/+4
2020-08-17AMDGPU: Match global saddr addressing modeMatt Arsenault1-19/+11
2020-08-15AMDGPU: Remove SIFixupVectorISel passMatt Arsenault1-14/+20
2020-07-17[MachineScheduler] Fix the TopDepth/BotHeightReduce latency heuristicsJay Foad1-38/+48
2020-07-17Revert "[AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem ...hsmahesha1-32/+32
2020-06-24[AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem ops clus...Your Name1-32/+32
2020-06-09Revert "[AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem ...hsmahesha1-32/+32
2020-06-09[AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem ops clus...hsmahesha1-32/+32
2020-05-05[AMDGPU] Better support for VMEM soft clauses in GCNHazardRecognizerJay Foad1-24/+0
2020-03-19[AMDGPU] Add Scratch Wave Offset to Scratch Buffer Descriptor in entry functionsScott Linder1-52/+41
2020-01-24[AMDGPU] Bundle loads before post-RA schedulerStanislav Mekhanoshin1-7/+11
2019-08-23[AMDGPU] Automatically generate various tests. NFCAmaury Sechet1-51/+182
2018-11-30[AMDGPU] Disable SReg Global LD/ST, perf regressionRon Lieberman1-1/+1
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