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path: root/llvm/test/CodeGen/AMDGPU
AgeCommit message (Expand)AuthorFilesLines
7 hours[SelectionDAGBuilder] Remove NoNaNsFPMath uses (#169904)paperchalice7-801/+1857
8 hours[llvm] Remove "no-infs-fp-math" attribute support (#180083)paperchalice1-6/+5
38 hours[AMDGPU][GlobalISel] Add lowering for G_FMODF (#180152)Alex Wang1-191/+425
47 hours[AMDGPU] Fix pattern selecting fmul to v_fma_mix_f32 (#180210)Jay Foad6-172/+172
47 hours[AMDGPU] Optimize S_OR_B32 to S_ADDK_I32 where possible (#177949)Iasonaskrpr6-666/+685
3 days[AMDGPU][GlobalISel] Fix D16 buffer load RegBankLegalize rules (#179982)vangthao952-0/+382
3 days[AMDGPU] Support v_lshl_add_u64 with non-constant shift amount (#179904)Frederik Harwath1-0/+163
3 days[AMDGPU] Fix and simplify patterns selecting fsub to v_fma_mix_f32 (#180169)Jay Foad6-85/+85
3 days[AMDGPU] Define new target gfx1170 (#180185)Mirko Brkušanin2-0/+4
3 days[ExpandIRInsts] Freeze input in itofp expansion (#180157)Nikita Popov1-5/+3
3 days[AMDGPU] Set MOThreadPrivate on memory accesses for spills (#179414)Pierre van Houtryve47-13181/+13180
3 days[AMDGPU][GFX12.5] Add support for emitting memory operations with nv bit set ...Pierre van Houtryve2-1/+366
3 daysAdding support for G_STRICT_FMA in new reg bank select (#170330)Abhinav Garg3-222/+2942
3 daysAMDGPU/GlobalISel: Regbanklegalize rules for G_FREEZE (#179796)Petar Avramovic1-0/+134
3 days[DAGCombiner] Fix exact power-of-two signed division for large integers (#177...Steffen Larsen2-72/+1562
3 daysAMDGPU/GlobalISel: Fix buffer store RegBankLegalize rules (#179994)vangthao954-20/+204
3 days[AMDGPU][GlobalISel] Add RegBankLegalize rules for TFE buffer loads (#179529)vangthao955-303/+781
3 daysReapply "AMDGPU: Use real copysign in fast pow (#97152)" (#178036)Matt Arsenault4-73/+57
4 days[AMDGPU] Global and Buffer loads to LDS should not increase `lgkmcnt` (#179305)Alexander Weinrauch3-2/+40
4 days[AMDGPU] [GlobalISel] Add register bank legalize rules for G_FEXP2 (#179954)anjenner6-8/+74
4 days[AMDGPU] Fix missing waitcnt after buffer_wbl2 (#178316)Vigneshwar Jayakumar28-53/+1276
4 days[GISel][CallLowering] Keep IR types longer (#179946)Nikita Popov1-12/+12
4 days[AMDGPU][GlobalISel] Add buffer store byte/short RegBankLegalize rules (#179367)vangthao955-124/+366
4 daysIR: Promote "denormal-fp-math" to a first class attribute (#174293)Matt Arsenault88-200/+205
4 days [LLVM] Select fma_mix for v_cvt_f32_f16 and v_add_f32/v_mul_f32 (#160151)Acim Maravic13-1307/+5296
4 daysAMDGPU: Add nofpclass when expanding pow (#177933)Matt Arsenault5-48/+50
4 days[AMDGPU] Return two MMOs for load-to-lds and store-from-lds intrinsics (#175845)Nicolai Hähnle3-12/+7
5 days[SelectionDAG] Add expansion for llvm.modf intrinsic (#179434)Alex Wang2-0/+682
5 days[AMDGPU][GlobalISel] Add G_SADDE/SSUBE RegBankLegalize rule (#179603)vangthao952-221/+107
5 days[AMDGPU][GlobalISel] Add buffer load format D16 RegBankLegalize rules (#179566)vangthao958-24/+24
5 days[AMDGPU][True16] t16 pseudo for mubuffer d16 load/store (#178822)Brox Chen32-674/+1014
5 days[AMDGPU] Add machineFunctionInfo to recent MIR tests (#179602)Carl Ritson2-3/+4
5 days[LowerMemIntrinsics] Optimize memset lowering (#169040)Fabian Ritter7-266/+4589
5 days[AMDGPU][SIRegisterInfo] Fix maxoffset calculation in buildSpillLoadStore (#1...Abhinav Garg1-0/+32
5 daysAMDGPU/GlobalISel: Fix sgpr s16 unmerge lowering in regbanklegalize (#179441)Petar Avramovic1-4/+4
6 days[AMDGPU][GlobalIsel] Add register bank legalization rules for fptoi and itofp...Syadus Sefat5-7/+429
6 days[AMDGPU][GlobalISel] Add tbuffer store d16 RegBankLegalize rule (#179411)vangthao954-9/+9
6 daysAMDGPU/GlobalISel: add mir test for sgpr s16 unmerge (#179440)Petar Avramovic1-0/+65
6 days[AMDGPU] Implement llvm.sponentry (#176357)Diana Picus1-0/+398
6 days[AMDGPU][SROA] Unify cast chain implementations (#177945)Steffen Larsen1-6/+57
6 days[AMDGPU] Add scheduling DAG mutation for hazard latencies (#170075)Carl Ritson6-105/+265
7 daysAMDGPU/GlobalISel: Regbanklegalize rules for G_UNMERGE_VALUES (#171653)Petar Avramovic4-45/+77
7 days[AMDGPU] Iterative scheduling must behave the same with/without debug (#178460)LU-JOHN1-0/+57
7 daysRe-apply "[AMDGPU][Scheduler] Scoring system for rematerializations (#175050)...Lucas Ramirez7-1257/+1987
7 daysAMDGPU: Use SimplifyQuery in AMDGPUCodeGenPrepare (#179133)Matt Arsenault1-0/+79
7 days[AMDGPU][Scheduler] Revert all regions when remat fails to increase occ. (#17...Lucas Ramirez2-15/+133
8 days[AMDGPU][Scheduler] Simplify scheduling revert logic (#177203)Lucas Ramirez2-3/+3
8 days[SDAG] Check for `nsz` in DAG.canIgnoreSignBitOfZero() (#178905)Benjamin Maxwell2-24/+20
9 days[AMDGPU] Introduce custom MIR formatting for s_wait_alu (#176316)vporpo14-245/+244
10 days[NFC] Reduce fragility of swdev503538-... test. (#176302)Daniil Fukalov1-2/+2