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path: root/llvm/lib/Target/X86/X86InstrMMX.td
AgeCommit message (Expand)AuthorFilesLines
2024-09-15[X86] Add missing immediate qualifier to the (V)PINSR/PEXTR instruction namesSimon Pilgrim1-3/+3
2024-07-23[X86] Add MMX nontemporal store patternSimon Pilgrim1-0/+10
2023-12-24[X86][NFC] Set default OpPrefix to PS for XOP/VEX/EVEX instructionsShengchen Kan1-3/+3
2023-12-22[X86][NFC] Not imply TB in PS|PD|XS|XDShengchen Kan1-6/+6
2023-12-19[X86][NFC] Remove redundant classes for MMX instuctionsShengchen Kan1-6/+6
2023-04-05[X86][mem-fold] Remove the logic for FoldGenData, NFCIShengchen Kan1-1/+1
2023-04-05[X86][mem-fold] Remove the logic for TB_NO_FORWARD | TB_NO_REVERSE, NFCIShengchen Kan1-2/+1
2023-04-05[X86][mem-fold] Remove definition of NotMemoryFoldable and move code into a d...Shengchen Kan1-1/+1
2023-02-21[X86][NFC] Reorganize X86InstrInfo.tdWang, Xin101-3/+0
2022-04-06[X86] Fold MMX_MOVD64from64rr + store to MMX_MOVQ64mr instead of MMX_MOVD64fr...Shengchen Kan1-1/+1
2022-03-22[X86] Rename MMX_MOVD64from64rm to MMX_MOVD64from64mr b/c it stores sth, NFCShengchen Kan1-1/+1
2021-12-12[X86][MMX] Remove superfluous 'i' from MMX cvt opnames. NFCI.Simon Pilgrim1-18/+18
2021-12-12[X86][MMX] Remove superfluous 'i' from MMX binop opnames. NFCI.Simon Pilgrim1-2/+2
2020-08-18[X86] Fix the Predicates on MMX_PSHUFWri/PSHUFWmi to include SSE1 in addition...Craig Topper1-0/+2
2020-05-30[X86] Remove unneeded bitconverts from isel patterns. NFCCraig Topper1-10/+6
2020-05-30[X86] Add DAG combine to turn (v2i64 (scalar_to_vector (i64 (bitconvert (mmx)...Craig Topper1-24/+7
2020-05-30[X86] Move MMX_SET0 pattern into the instruction definition. NFCCraig Topper1-7/+3
2020-05-29[X86] Remove isel pattern for MMX_X86movdq2q+simple_load. Replace with DAG co...Craig Topper1-3/+0
2020-05-28[X86] Remove MMX isel patterns containing (x86mmx (scalar_to_vector (i32))).Craig Topper1-14/+2
2019-11-01[X86] Model MXCSR for MMX FP instructionsPengfei Wang1-5/+5
2019-09-23[X86] Convert to Constant arguments to MMX shift by i32 intrinsics to TargetC...Craig Topper1-1/+1
2019-09-23[X86] Remove stale FIXME.Craig Topper1-1/+0
2019-09-20[X86] Use timm in MMX pinsrw/pextrw isel patterns. Add missing test cases.Craig Topper1-3/+3
2019-09-19Reapply r372285 "GlobalISel: Don't materialize immarg arguments to intrinsics"Matt Arsenault1-4/+4
2019-09-19Revert r372285 "GlobalISel: Don't materialize immarg arguments to intrinsics"Hans Wennborg1-4/+4
2019-09-19GlobalISel: Don't materialize immarg arguments to intrinsicsMatt Arsenault1-4/+4
2019-09-12Rename nonvolatile_load/store to simple_load/store [NFC]Philip Reames1-1/+1
2019-08-15[X86] Add custom type legalization for bitcasting mmx to v2i32/v4i16/v8i8 to ...Craig Topper1-0/+7
2019-08-15[X86] Add isel pattern to match VZEXT_MOVL and a v2i64 scalar_to_vector bitca...Craig Topper1-0/+4
2019-08-15[X86] Make sure load is non-volatile in the MMX_X86movdq2q (loadv2i64) isel p...Craig Topper1-1/+1
2019-08-15[X86] Remove unneeded isel pattern for v4f32->v4i32 fp_to_sint and conversion...Craig Topper1-3/+0
2019-02-04Recommit r352660 "[X86] Mark EMMS and FEMMS as clobbering MM0-7 and ST0-7."Craig Topper1-1/+3
2019-01-31Revert "[X86] Mark EMMS and FEMMS as clobbering MM0-7 and ST0-7."Craig Topper1-3/+1
2019-01-30[X86] Mark EMMS and FEMMS as clobbering MM0-7 and ST0-7.Craig Topper1-1/+3
2019-01-23[MC][X86] Correctly model additional operand latency caused by transfer delay...Andrea Di Biagio1-1/+1
2019-01-19Update the file headers across all of the LLVM projects in the monorepoChandler Carruth1-4/+3
2018-10-05[X86] Move ReadAfterLd functionality into X86FoldableSchedWrite (PR36957)Simon Pilgrim1-5/+5
2018-07-10[X86] Remove AddedComplexity from all patterns that use X86vzmovl as their root.Craig Topper1-2/+0
2018-07-10[X86] Remove AddedComplexity from MMX_X86movw2d patterns.Craig Topper1-9/+6
2018-06-18[X86] Add '.s' aliases to the assembler for the various redundant move encodi...Craig Topper1-3/+3
2018-06-14[x86] fix mappings of cvttp2si/cvttp2ui x86 intrinsics to x86-specific nodes ...Craig Topper1-0/+3
2018-06-05[X86] Make all instructions that operate on MMX types, but were added after t...Craig Topper1-12/+12
2018-05-23[X86][MIPS][ARM] New machine instruction property 'isMoveReg'Petar Jovanovic1-2/+2
2018-05-18[X86] Add GPR<->XMM Schedule TagsSimon Pilgrim1-9/+10
2018-05-18[X86][SSE] Ensure vector partial load/stores use the WriteVecLoad/WriteVecSto...Simon Pilgrim1-2/+2
2018-05-16[X86] Split WriteCvtI2F/WriteCvtF2I into I<->F32 and I<->F64 scheduler classesSimon Pilgrim1-7/+7
2018-05-14[X86] Add NT load/store scheduler classesSimon Pilgrim1-1/+1
2018-05-11[X86][MMX] Tag MMX Move/Load/Store as WriteVec schedule classesSimon Pilgrim1-5/+5
2018-05-11[X86] Added scheduler helper classes to split move/load/store by sizeSimon Pilgrim1-1/+1
2018-05-04[X86] Add WriteEMMS scheduler classSimon Pilgrim1-2/+1
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