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path: root/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
AgeCommit message (Expand)AuthorFilesLines
41 hours[RISCV] Adjust unroll prefs for loops with vectors (#151525)Ramkumar Ramachandra1-8/+7
3 days[RISCV] Fix bug in [l](lrint|lround) vector-cost (#151298)Ramkumar Ramachandra1-2/+7
4 days[RISCV] Fix build failure in getIntrinsicInstrCost (#151210)Ramkumar Ramachandra1-1/+1
4 days[CostModel/RISCV] Fix costs of vector [l](lrint|lround) (#146058)Ramkumar Ramachandra1-8/+37
8 daysRevert "[RISCV][TTI] Enable masked interleave access for scalable vector (#14...Alex Bradbury1-6/+4
8 days[RISCV][TTI] Enable masked interleave access for scalable vector (#149981)Mel Chen1-4/+6
10 days[RISCV][TTI] Implement vector costs for `llvm.fpto{u|s}i.sat()`. (#143655)Elvis Wang1-0/+28
2025-07-10[RISCV] Unify non-vp and vp rounding intrinsic costing (#147872)Luke Lau1-41/+0
2025-07-10[TTI] Move vp.{select,merge} costing from RISCV to BasicTTIImpl. NFC (#147870)Luke Lau1-11/+0
2025-06-21[CostModel] Add a DstTy to getShuffleCost (#141634)David Green1-33/+47
2025-06-19[TTI] Plumb CostKind through getPartialReductionCost (#144953)Philip Reames1-5/+4
2025-06-18[TTI] Remove PPC hasActiveVectorLength impl, simplify interface (NFC). (#142310)Florian Hahn1-1/+1
2025-06-18[RISCV] Support non-power-of-2 types when expanding memcmpPengcheng Wang1-14/+7
2025-06-17[RISCV] Consolidate both copies of getLMUL1VT [nfc] (#144568)Philip Reames1-10/+1
2025-06-16[RISCV] Use RISCV::RVVBitsPerBlock instead of 64 in getLMUL1VT. NFC (#144401)Craig Topper1-1/+1
2025-06-16[RISCV][TTI] Refine reverse shuffle costing for high LMUL (#144155)Philip Reames1-22/+62
2025-06-13[RISCV] Support memcmp expansion for vectorsPengcheng Wang1-0/+17
2025-06-10[RISCV][TTI] Allow partial reduce with mismatched extends (#143608)Philip Reames1-2/+1
2025-05-30[RISCV][TTI] Discount slide cost if ri.vinsert/ri.vextract are available (#14...Philip Reames1-1/+4
2025-05-26[RISCV][TTI] Adjust costing in getPartialReductionCost for zvqdotq (#141430)Philip Reames1-2/+2
2025-05-23[RISCV][TTI] Implement getPartialReductionCost for the vqdotq cases (#140974)Philip Reames1-0/+23
2025-05-01[CostModel] Make Op0 and Op1 const in getVectorInstrCost. NFC (#137631)David Green1-2/+3
2025-04-30[SLPVectorizer] Move X86 specific handling into X86TTIImpl. (#137830)Jonas Paulsson1-1/+2
2025-04-27[RISCV] Sink vp.splat operands of VP intrinsic. (#133245)MingYan1-7/+15
2025-04-23[CostModel] Remove optional from InstructionCost::getValue() (#135596)David Green1-1/+1
2025-04-22Fix build error introduced by 1c722fcPhilip Reames1-2/+2
2025-04-22[RISCV][TTI] Use processShuffleMask for shuffle legalization estimate (#136191)Philip Reames1-41/+62
2025-04-22[TTI] Fix discrepancies in prototypes between interface and implementations (...Sergei Barannikov1-1/+1
2025-04-22[TTI] Make all interface methods const (NFCI) (#136598)Sergei Barannikov1-15/+16
2025-04-21[TTI] Constify BasicTTIImplBase::thisT() (NFCI) (#136575)Sergei Barannikov1-27/+28
2025-04-21[RISCV] Handle scalarized reductions in getArithmeticReductionCostLuke Lau1-3/+2
2025-03-29[RISCV][TTI] Adjust VLS shuffle costing to account for sub-mask reuse (#129793)Philip Reames1-0/+4
2025-03-28[RISCV] Don't vectorize for loops with small trip count (#132176)Pengcheng Wang1-0/+10
2025-03-19[TTI] Align optional FMFs in getExtendedReductionCost() to getArithmeticReduc...Elvis Wang1-1/+1
2025-03-19[RISCV] Sink NOT to be fold into ANDN/ORN/XNOR/VANDN (#131632)Piotr Fusik1-0/+33
2025-03-04[RISCV] Simplify costShuffleViaVRegSplitting [nfc] (#129766)Philip Reames1-25/+4
2025-03-04[RISCV][TTI] Use early return to simplify costShuffleViaVRegSplitting [nfc]Philip Reames1-11/+11
2025-03-04[RISCV][TTI] Simplify code using getRealVLen() [NFC]Philip Reames1-5/+3
2025-02-28Reapply "[RISCV][TTI] Add shuffle costing for masked slide lowering (#128537)"Philip Reames1-2/+70
2025-02-27Revert "[RISCV][TTI] Add shuffle costing for masked slide lowering (#128537)"Philip Reames1-70/+2
2025-02-27[RISCV][TTI] Add shuffle costing for masked slide lowering (#128537)Philip Reames1-2/+70
2025-02-27[RISCV][TTI] Fix a misuse of the getShuffleCost API [NFC] (#129137)Philip Reames1-3/+3
2025-02-27[RISCV] Correct RISCVTTIImpl::getIntImmCostInst for Zba (#128174)Gergely Futo1-1/+2
2025-02-24[RISCV][TTI] Remove SK_Select from manual splitting in getShuffleCostPhilip Reames1-1/+0
2025-02-24TargetTransformInfo: Add missing consts to a couple of methods (#128492)Matt Arsenault1-1/+1
2025-02-22[RISCV][TTI] Avoid complicated fallthrough in getShuffleCost [nfc]Philip Reames1-47/+57
2025-02-22[RISCV][TTI] Common a check in getShufleCost [nfc]Philip Reames1-12/+11
2025-02-18[RISCV] Move the RISCVII namespaced enums into RISCVVType namespace in RISCVT...Craig Topper1-3/+5
2025-02-14[RISCV] Generalize cost model for vp_fneg. NFC. (#126915)Mikhail R. Gadelha1-7/+0
2025-02-10[RISCV] Add cost model for fma (#126076)Mikhail R. Gadelha1-0/+1
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