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path: root/llvm/lib/Target/RISCV/RISCVInstrInfoV.td
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2025-07-21[RISCV] Fix VLOptimizer assert, relax ElementsDependOn on viota/vms{b,i,o}f.m...Luke Lau1-2/+2
2025-06-23[RISCV] Make All VType Parts Optional (#144971)Sam Elliott1-2/+2
2025-06-23[RISCV] Fix comment typo and indentation for class SchedNary. NFC.Jim Lin1-6/+7
2025-03-24[RISCV][NFC] Fix the comment for VALUVINoVm (#132730)Piotr Fusik1-1/+1
2025-03-18[RISCV] Use MnemonicAlias instead of InstAlias for some vector instructions. ...Craig Topper1-14/+7
2025-03-17[RISCV] Accept '0(reg)' in addition to '(reg)' for vle1.v/vse1.vCraig Topper1-4/+4
2025-03-17[RISCV] Accept '0(reg)' in addition to '(reg)' ifor vl1r.v/vl2r.v/vl4r.v/vl8r.vCraig Topper1-4/+4
2025-03-14[RISCV] Reorder include of RISCVInstrInfoZi* before C and Zc*. NFC (#131274)Craig Topper1-2/+0
2025-02-28[RISCV][MCA] Pick the correct VPseudo sched class for indexed memory operatio...Min-Yih Hsu1-0/+24
2025-02-27[RISCV] Add VL and VTYPE to implicit uses on MC vector instructions that also...Craig Topper1-17/+17
2025-02-08[RISCV][NFC] Adopt DiagnosticString interface (#126290)Sam Elliott1-0/+2
2025-01-24[RISCV][MC] Create an AsmOperand for carry-in vmask (#124317)Min-Yih Hsu1-15/+20
2024-12-21[RISCV][NFCI] Rationalize Immediate Definitions (#120718)Sam Elliott1-7/+1
2024-12-04[RISCV] Mark vmvNr.v as implicitly using vtype (#118414)Luke Lau1-1/+1
2024-10-29[RISCV] Avoid redundant SchedRead on _TIED VPseudos (#113940)Min-Yih Hsu1-2/+17
2024-10-28[RISCV] Assign different scheduling classes for VMADC/VMSBC (#113009)Min-Yih Hsu1-6/+12
2024-10-28[RISCV] Add DestEEW = EEW1 to VMADC. (#113013)Craig Topper1-4/+2
2024-09-05[RISCV] Model dest EEW and fix peepholes not checking EEW (#105945)Luke Lau1-25/+32
2024-08-30[RISCV] Separate ActiveElementsAffectResult into VL and Mask flags (#106517)Luke Lau1-16/+16
2024-08-29[RISCV] Fix v[f]slide1down.vx having VL changed (#106110)Luke Lau1-0/+2
2024-08-05[RISCV] Move ActiveElementsAffectResult to TSFlags. NFC (#101123)Luke Lau1-14/+14
2024-07-30[RISCV] Rename merge operand -> passthru. NFC (#100330)Luke Lau1-18/+18
2024-05-23[RISCV] Split sched classes for vrgather.vv and vrgatherei16.vv (#92768)Michael Maitland1-2/+3
2024-05-20[RISCV] Split and rename WriteVISlideX into WriteVSlideUpX and WriteVSlideDow...Min-Yih Hsu1-5/+8
2024-03-27[RISCV] Model vd as a src for some Zvk* instructions in MC layer. (#86710)Craig Topper1-8/+0
2024-03-26[RISCV] Remove unnecessary overrides of a defaulted template argument. NFCCraig Topper1-4/+4
2024-03-25[RISCV] Remove unused forceMergeOpRead from SchedTernary class. NFCCraig Topper1-4/+2
2024-03-11[RISCV] Rename schedule classes for vmv.s.x, vmv.x.s, vfmv.s.f, and vfmv.f.s ...Philip Reames1-4/+4
2024-02-06[RISCV] Adjust a few vector scheduler class names. NFC (#80795)Craig Topper1-4/+4
2023-10-08[RISCV][NFC] Add base classes of Operand and uimm/simm (#68472)Wang Pengcheng1-10/+3
2023-08-13[RISCV] Add SchedRead for merge operandMichael Maitland1-27/+34
2023-08-10[RISCV][NFC] Use named arguments in newly added changeswangpc1-3/+3
2023-08-07[RISCV] Refactor to reduce some duplication in RISCVInstrInfoV.td. NFCCraig Topper1-73/+44
2023-08-04[RISCV] Model all 3 arithmetic sources of vector FMA at MC layer.Craig Topper1-27/+51
2023-07-28[RISCV] Add codegen support for bf16 vectorJun Sha (Joshua)1-0/+1
2023-07-27[RISCV][NFC] Change type of isOrdered to booleanwangpc1-30/+30
2023-07-26[RISCV] Add SchedRead for Merge operands on MASK PseudosMichael Maitland1-36/+45
2023-07-26[RISCV] Add subclasses of Sched to simplify codewangpc1-317/+326
2023-07-18[RISCV] Add isMoveReg to vmv1r/vmv2r/vmv4r/vmv8r.v.Craig Topper1-1/+1
2023-07-13[RISCV] Add initial SDNode patterns for unary zvbb instructionsLuke Lau1-2/+0
2023-07-12[RISCV] Split scheduler class for integer min/max reduction from other intege...Craig Topper1-8/+14
2023-06-21[RISCV] Separate scheduler calsses for vfredmax/minMichael Maitland1-2/+8
2023-06-07[RISCV] Use inheritance to reduce repeated code in RISCVInstrInfoV.td. NFCCraig Topper1-94/+73
2023-06-06[RISCV] Fix sched class for MC layer version of vmsgt.vx.Craig Topper1-1/+1
2023-06-06[RISCV] Fix sched class for MC layer version of vrsub.vx.Craig Topper1-1/+1
2023-06-06[RISCV] Split scheduler classes for vector min/max from compares.Craig Topper1-6/+24
2023-06-05[RISCV] Switch vwsll.v* instructions to use the VSHT_IV_V_X_I class instead o...Craig Topper1-2/+2
2023-06-02[RISCV] Remove optype parameter from most V instruction multiclasses. NFCCraig Topper1-34/+34
2023-06-02[RISCV] Simplify vector instruction multiclasses. NFCCraig Topper1-119/+119
2023-05-19[RISCV][MC] Add support for experimental Zvfbfmin extensionAlex Bradbury1-0/+1
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