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path: root/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
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2025-04-14[HEXAGON] Fix corner cases for hwloops pass (#135439)aankit-ca1-1/+45
2025-04-11[NFC][LLVM][Hexagon] Cleanup pass initialization for Hexagon (#134431)Rahul Joshi1-7/+1
2025-02-11[Hexagon] Fix typos discovered by codespell (NFC) (#126233)Sudharsan Veeravalli1-3/+3
2024-11-17[Hexagon] Remove unused includes (NFC) (#116529)Kazu Hirata1-1/+0
2024-07-09[CodeGen][NewPM] Port `machine-loops` to new pass manager (#97793)paperchalice1-4/+4
2024-06-11[CodeGen][NewPM] Split `MachineDominatorTree` into a concrete analysis result...paperchalice1-3/+3
2024-04-30[Hexagon] Let ArrayRef infer the array size (NFC) (#90534)Kazu Hirata1-2/+1
2023-04-15[Target] Use range-based for loops (NFC)Kazu Hirata1-6/+3
2023-01-05Move from llvm::makeArrayRef to ArrayRef deduction guides - llvm/ partserge-sans-paille1-2/+2
2022-11-13[Hexagon] Use `Register` instead of `unsigned`, NFCKrzysztof Parzyszek1-23/+31
2022-09-08[llvm] Use std::size instead of llvm::array_lengthofJoe Loser1-2/+2
2022-08-16Untangle the mess which is MachineBasicBlock::hasAddressTaken().Eli Friedman1-7/+2
2022-06-03[llvm] Remove unneeded cl::ZeroOrMore for cl::opt options. NFCFangrui Song1-3/+3
2022-03-16[NFC][CodeGen] Rename some functions in MachineInstr.h and remove duplicated ...Shengchen Kan1-2/+2
2022-01-26Revert "Rename llvm::array_lengthof into llvm::size to match std::size from C...Benjamin Kramer1-2/+2
2022-01-26Rename llvm::array_lengthof into llvm::size to match std::size from C++17serge-sans-paille1-2/+2
2022-01-05[Hexagon] Replace isImmValidForOpcode() with isExtendable flagIkhlas Ajbar1-13/+3
2021-12-31[Hexagon] Use range-based for loops (NFC)Kazu Hirata1-2/+2
2021-11-26[Target] Use range-based for loops (NFC)Kazu Hirata1-4/+2
2021-11-22[llvm] Use range-based for loops (NFC)Kazu Hirata1-2/+1
2021-11-22[Target] Use range-based for loops (NFC)Kazu Hirata1-7/+4
2021-11-22[NFC][llvm][Hexagon] Inclusive Terms remove uses of sanity in Hexagon tagetZarko Todorovski1-1/+1
2021-11-04[Hexagon] Use make_early_inc_range (NFC)Kazu Hirata1-7/+7
2021-08-30[InstrInfo] Use 64-bit immediates for analyzeCompare() (NFCI)Nikita Popov1-3/+3
2021-07-27[Hexagon] Fix resetting dead registers in DBG_VALUE_LISTsKrzysztof Parzyszek1-3/+2
2021-02-14[llvm] Use llvm::is_contained (NFC)Kazu Hirata1-4/+2
2020-11-18[NFC] Use [MC]Register for Hexagon targetGaurav Jain1-2/+2
2020-09-22[LoopInfo] empty() -> isInnermost(), add isOutermost()Stefanos Baziotis1-1/+1
2020-04-03CodeGen: Convert some TII hooks to use RegisterMatt Arsenault1-3/+3
2020-01-21Update spelling of {analyze,insert,remove}Branch in strings and commentsKrzysztof Parzyszek1-3/+3
2019-11-13Sink all InitializePasses.h includesReid Kleckner1-0/+1
2019-08-15Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVMDaniel Sanders1-26/+26
2019-08-01Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Re...Daniel Sanders1-2/+2
2019-01-19Update the file headers across all of the LLVM projects in the monorepoChandler Carruth1-4/+3
2018-09-10Don't create a temporary vector of loop blocks just to iterate over them.Benjamin Kramer1-8/+6
2018-05-14Rename DEBUG macro to LLVM_DEBUG.Nicola Zaghen1-10/+11
2018-05-01Remove \brief commands from doxygen comments.Adrian Prantl1-26/+26
2018-04-06[Hexagon] Handle subregisters when calculating iteration count in HW loopsKrzysztof Parzyszek1-0/+1
2017-12-15MachineFunction: Return reference from getFunction(); NFCMatthias Braun1-1/+1
2017-12-07[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.Francis Visoiu Mistrih1-1/+1
2017-12-04[CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih1-2/+2
2017-11-30[CodeGen] Print "%vreg0" as "%0" in both MIR and debug outputFrancis Visoiu Mistrih1-3/+3
2017-11-28[CodeGen] Print register names in lowercase in both MIR and debug outputFrancis Visoiu Mistrih1-1/+1
2017-11-28[CodeGen] Rename functions PrintReg* to printReg*Francis Visoiu Mistrih1-1/+1
2017-11-17Fix a bunch more layering of CodeGen headers that are in TargetDavid Blaikie1-1/+1
2017-10-20[Hexagon] Reorganize and update instruction patternsKrzysztof Parzyszek1-6/+20
2017-10-20[Hexagon] Allow redefinition with immediates for hw loop conversionKrzysztof Parzyszek1-7/+11
2017-09-15[llvm] Fix some typos. NFC.Mandeep Singh Grang1-1/+1
2017-09-15[Hexagon] Switch to parameterized register classes for HVXKrzysztof Parzyszek1-1/+1
2017-07-29[Hexagon] Fix some Clang-tidy modernize-use-using and Include What You Use wa...Eugene Zelenko1-16/+25
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