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path: root/llvm/lib/Target/AVR/AVRInstrInfo.td
AgeCommit message (Expand)AuthorFilesLines
2025-05-11[AVR] TableGen-erate SDNode descriptions (NFC) (#139407)Sergei Barannikov1-17/+38
2025-05-10[AVR][NFC] Improve format of TD files (#139249)Ben Shi1-249/+108
2025-04-28[Targets] Migrate from atomic_load_8/16/32/64 to atomic_load_nonext_8/16/32/6...Craig Topper1-2/+2
2025-03-26[AVR] Fix a bug in selection of ANY_EXTEND (#132398)Ben Shi1-4/+4
2025-01-14[AVR][NFC] Improve format of target description files (#122845)Ben Shi1-311/+104
2024-12-12[TableGen] Replace WantRoot/WantParent SDNode properties with flags (#119599)Sergei Barannikov1-1/+2
2024-12-05[AVR] Simplify eocoding of load/store instructions (#118279)Ben Shi1-39/+9
2024-11-24[AVR] Fix shift node descriptions (#117456)Sergei Barannikov1-3/+3
2024-11-09[TableGen][SelectionDAG] Remove the `implicit` DAG node (#115295)Sergei Barannikov1-86/+55
2024-06-24[AVR][NFC] Improve format of target description files (#96449)Ben Shi1-279/+108
2024-06-13DAG: Replace bitwidth with type in suffix in atomic tablegen ops (#94845)Matt Arsenault1-10/+10
2024-05-07[AVR][NFC] Improve format of target description files (#91296)Ben Shi1-247/+90
2024-04-02[AVR][NFC] Improve format of target description files (#87212)Ben Shi1-245/+75
2024-03-15[AVR] Remove earlyclobber from LDDRdPtrQ (#85277)Patryk Wychowaniec1-1/+1
2024-03-04[AVR][NFC] Reformat target description files (#83755)Ben Shi1-55/+44
2023-08-31SelectionDAG: Swap operands of atomic_storeMatt Arsenault1-3/+1
2023-06-11[AVR] Fix incorrect expansion of pseudo instruction ROLBRdBen Shi1-10/+15
2023-06-04[AVR] Fix incorrect operands of pseudo instruction 'ROLBRd'Patryk Wychowaniec1-3/+6
2023-04-06[AVR] Fix incorrect expansion of pseudo instructions LPMWRdZ/ELPMWRdZBen Shi1-20/+18
2023-04-02[Targets] Rename Flag->Glue. NFCCraig Topper1-4/+4
2023-03-24[AVR] Do not emit 'LPM Rd, Z' on devices without FeatureLPMXBen Shi1-0/+5
2023-03-21[AVR] Fix incorrect expansion of the pseudo 'ELPMBRdZ' instructionBen Shi1-4/+6
2023-01-08[AVR] Custom lower 32-bit shift instructionsAyke van Laethem1-0/+18
2022-12-23[AVR] Select 16-bit LDS/STS for load/store on AVRTiny.Ben Shi1-3/+10
2022-12-23[AVR] Support 16-bit LDS/STS on AVRTiny.Ben Shi1-1/+16
2022-12-22[AVR] Do not emit instructions invalid for attiny10Ayke van Laethem1-35/+49
2022-11-28[AVR] Do not use R0/R1 on avrtinyAyke van Laethem1-18/+13
2022-11-27[AVR] Remove unused register scavengerAyke van Laethem1-0/+2
2022-09-25[AVR] Fix useDeprecatedPositionallyEncodedOperands errors.James Y Knight1-85/+85
2022-08-15[AVR] Only push and clear R1 in interrupts when necessaryAyke van Laethem1-0/+2
2022-05-09[AVR] Add PrintMethod for operand memspiBen Shi1-1/+4
2022-05-05[MC][AVR] Implement decoding STD/LDDBen Shi1-0/+1
2022-03-26[AVR] Optimize int16 airthmetic right shift for shift amount 7/14/15Ben Shi1-1/+1
2022-03-23[AVR] Generate 'rcall' instead of 'call' on avr2 and avr25Ben Shi1-12/+16
2022-02-02[AVR] Fix atomicrmw result valueAyke van Laethem1-35/+26
2022-01-23[AVR] Make use of the constant value 0 in R1Ayke van Laethem1-0/+4
2022-01-23[AVR] Remove regalloc workaround for LDDWRdPtrQAyke van Laethem1-1/+1
2022-01-20[AVR] Generate ELPM for loading byte/word from extended program memoryBen Shi1-12/+25
2022-01-04[AVR] Optimize int16 shift operation for shift amount greater than 8Ben Shi1-0/+12
2021-09-04[NFC] Run clang-format on llvm/lib/Trget/AVR/Shivam Gupta1-1297/+1626
2021-07-24[AVR] Fix rotate instructionsAyke van Laethem1-14/+14
2021-07-24[AVR] Improve 8/16 bit atomic operationsAyke van Laethem1-0/+1
2021-07-24[AVR] Set R31R30 as clobbered after ADJCALLSTACKDOWNAyke van Laethem1-5/+7
2021-05-31[AVR][NFC] Refactor 8-bit & 16-bit shiftsBen Shi1-56/+38
2021-03-03[AVR] Fix expansion of NEGWAyke van Laethem1-1/+1
2021-02-14[AVR] Fix a bug in 16-bit shiftsBen Shi1-4/+4
2021-01-28[AVR] Optimize 16-bit int shiftBen Shi1-6/+43
2021-01-24[AVR] Optimize 8-bit int shiftBen Shi1-0/+18
2021-01-23[AVR] Optimize 8-bit logic left/right shiftsBen Shi1-1/+4
2020-11-17[AVR] Optimize the 16-bit NEGW pseudo instructionBen Shi1-1/+11
generated by cgit v1.1 at 2025-08-09 09:17:04 +0000