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AgeCommit message (Expand)AuthorFilesLines
12 hoursARM: Avoid using isTarget wrappers around Triple predicates (#179512)Matt Arsenault2-22/+31
29 hours[CodeGen] Refactor targets to override the new getTgtMemIntrinsic overload (N...Nicolai Hähnle2-24/+38
38 hours[ARM] Lower unaligned loads/stores to aeabi functions. (#172672)Simi Pallipurath2-8/+144
5 days[AArch64] Optimize memset to use NEON DUP instruction for more sizes (#166030)Osama Abdelkader1-1/+2
8 days[TTI] Add VectorInstrContext for context-aware insert/extract costs. (#175982)Florian Hahn2-10/+12
9 days[ARM] Count register copies when estimating function size (#175763)Simon Tatham2-0/+7
12 days[NFC][MI] Tidy Up RegState enum use (2/2) (#177090)Sam Elliott7-30/+27
2026-01-20DAG: Get libcall info from LibcallLowering in more places (#176836)Matt Arsenault1-3/+3
2026-01-20CodeGen: Use LibcallLoweringInfo for stack protector insertion (#176829)Matt Arsenault2-5/+8
2026-01-19FastISel: Thread LibcallLoweringInfo through (#176799)Matt Arsenault3-19/+30
2026-01-19[X86][WinEH] Insert nop after unwinding inline assembly (#176393)Nikita Popov2-2/+4
2026-01-16Reland "[NFC][MI] Tidy Up RegState enum use (1/2)" (#176277)Sam Elliott3-10/+10
2026-01-16ARM: Avoid using getLibcallName (#176418)Matt Arsenault1-3/+5
2026-01-16GlobalISel: Use LibcallLoweringInfo analysis in legalizer (#170328)Matt Arsenault1-9/+9
2026-01-16[ARM] Fix inlining issue in ARM (#169337)Croose2-34/+181
2026-01-16DAG: Avoid querying libcall info from TargetLowering (#176268)Matt Arsenault2-16/+18
2026-01-15[NFC][TargetLowering] Make shouldExpandAtomicRMWInIR and shouldExpandAtomicCm...Akshay Deodhar2-4/+5
2026-01-15[ARM] Add size to `tLDRLIT_ga_pcrel|abs` Pseudo Instructions (#175663)Usman Nadeem1-2/+6
2026-01-15Revert "[NFC][MI] Tidy Up RegState enum use (1/2)" (#176190)Sam Elliott3-10/+10
2026-01-15[NFC][MI] Tidy Up RegState enum use (1/2) (#176091)Sam Elliott3-10/+10
2026-01-14[ARM] Add tablegen patterns for vsdot and vudot high index. (#174728)David Green1-0/+24
2026-01-13[CodeGen][InlineSpiller] Add SubReg argument to loadRegFromStackSlot for subr...Christudasan Devadasan6-6/+6
2026-01-11[TargetLowering] Change the `softPromoteHalfType` default to `true` (#175149)Trevor Gross1-2/+0
2025-12-28[CodeGen] Fix EVT::changeVectorElementType assertion on simple-to-extended fa...Islam Imad1-4/+6
2025-12-19RuntimeLibcalls: Add entries for stack probe functions (#167453)Matt Arsenault2-5/+16
2025-12-16[CodeGen] expand-fp: Change frem expansion criterion (#158285)Frederik Harwath1-3/+3
2025-12-14[ARM] Introduce intrinsics for MVE fp-converts under strict-fp. (#170686)David Green1-9/+11
2025-12-14[ARM] Introduce intrinsics for MVE vcmp under strict-fp. (#169798)David Green1-15/+34
2025-12-14[ARM] Introduce intrinsics for MVE vrnd under strict-fp. (#169797)David Green1-0/+3
2025-12-14[ARM][MVE] Avoid `PHINode::removeIncomingValue()` with `PHINode::setIncomingV...Mingjie Xu1-16/+19
2025-12-13DAG: Make more use of the LibcallImpl overload of getExternalSymbol (#172171)Matt Arsenault1-15/+24
2025-12-11[SCEVExp] Get DL from SE, strip constructor arg (NFC) (#171823)Ramkumar Ramachandra1-2/+1
2025-12-09[ThumbRegisterInfo] Use getSigned() for constant pool loadsNikita Popov1-4/+4
2025-12-08cmse: emit `__acle_se_` symbol for aliases to entry functions (#162109)Folkert de Vries2-0/+32
2025-12-04[TTI] Remove masked/gather-scatter/strided/expand-compress costing from TTIIm...Shih-Po Hung2-7/+23
2025-12-03[CodeGen] Add MO_LaneMask type and a new COPY_LANEMASK instruction (#151944)Vikash Gupta1-0/+1
2025-12-03[TTI] Use MemIntrinsicCostAttributes for getGatherScatterOpCost (#168650)Shih-Po Hung2-9/+13
2025-12-02[NFC] Refactor TargetLowering::getTgtMemIntrinsic to take CallBase parameter ...Robert Imschweiler2-3/+2
2025-12-02[ARM] Introduce intrinsics for MVE minnm/maxnm under strict-fp. (#169795)David Green1-8/+14
2025-12-02Revert "[AArch64][ARM] Move ARM-specific InstCombine transforms into `Transfo...David Green1-14/+0
2025-12-02[AArch64][ARM] Move ARM-specific InstCombine transforms into `Transforms/Util...valadaptive1-0/+14
2025-12-02[Arm] Control forced unrolling of small loops (#170127)Vladi Krapp1-1/+6
2025-12-01[ARM] Disable strict node mutation and use correct lowering for several stric...Erik Enikeev2-32/+40
2025-11-30[ARM] Introduce intrinsics for MVE fma under strict-fp. (#169771)David Green1-0/+12
2025-11-28[ARM] Auto-decode pred operands of Thumb instructions (#156540)Sergei Barannikov6-68/+165
2025-11-27[ARM] Remove Subtarget from ARMAsmPrinter (#168264)David Green4-33/+29
2025-11-26CodeGen: Make all targets override pseudos with pointers (#159881)Matt Arsenault1-0/+8
2025-11-25MC: Remove unneeded parameter `MCAsmBackend *`. NFCFangrui Song1-1/+1
2025-11-25CodeGen: Move libcall lowering configuration to subtarget (#168621)Matt Arsenault3-68/+71
2025-11-25[NVPTX] Lower LLVM masked vector loads and stores to PTX (#159387)Drew Kersnar2-7/+12
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