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path: root/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
AgeCommit message (Expand)AuthorFilesLines
4 daysReapply "[llvm] Add CalleeTypeIds field to CallSiteInfo" (#150335) (#150990)Prabhu Rajasekaran1-3/+11
9 daysRevert "[llvm] Add CalleeTypeIds field to CallSiteInfo" (#150335)Haowei1-11/+3
10 days[llvm] Add CalleeTypeIds field to CallSiteInfoPrabhu Rajasekaran1-3/+11
2025-06-06[MIRParser] Report register class errors in a deterministic order (#142928)Jay Foad1-9/+19
2025-05-22[LLVM][CodeGen] Add convenience accessors for MachineFunctionProperties (#140...users/pcc/spr/main.elf-add-branch-to-branch-optimizationRahul Joshi1-10/+8
2025-03-06[win] NFC: Rename `EHCatchret` to `EHCont` to allow for EH Continuation targe...Daniel Paoliello1-1/+1
2025-03-06[IR] Store Triple in Module (NFC) (#129868)Nikita Popov1-4/+4
2025-03-04[MIRParser] Use Register::id(). Pass Twine by reference. NFCCraig Topper1-2/+2
2025-03-02[CodeGen] Use Register::id() to avoid implicit cast. NFCCraig Topper1-1/+1
2025-01-13Reapply "[aarch64][win] Add support for import call optimization (equivalent ...Daniel Paoliello1-12/+62
2025-01-13Revert "[aarch64][win] Add support for import call optimization (equivalent t...Kirill Stoimenov1-62/+12
2025-01-11[aarch64][win] Add support for import call optimization (equivalent to MSVC /...Daniel Paoliello1-12/+62
2024-11-14Overhaul the TargetMachine and LLVMTargetMachine Classes (#111234)Matin Raayai1-3/+3
2024-10-16[MIR] Fix vreg flag vector memory leak (#112479)Akshat Oke1-1/+1
2024-10-14[MIR] Add missing noteNewVirtualRegister callbacks (#111634)Akshat Oke1-0/+1
2024-10-14[MIR] Serialize virtual register flags (#110228)Akshat Oke1-0/+9
2024-10-04[LLVM] Add HasFakeUses to MachineFunction (#110097)Stephen Tozer1-0/+13
2024-09-25Reapply "Deprecate the `-fbasic-block-sections=labels` option." (#110039)Rahman Lavaee1-3/+1
2024-09-25Revert "Deprecate the `-fbasic-block-sections=labels` option. (#107494)"Kazu Hirata1-1/+3
2024-09-25Deprecate the `-fbasic-block-sections=labels` option. (#107494)Rahman Lavaee1-3/+1
2024-09-25[MIR] Fix return value when computed properties conflict with given prop (#10...Dominik Montada1-2/+2
2024-09-24llvm-reduce: Don't print verifier failed machine functions (#109673)Matt Arsenault1-1/+1
2024-09-24[MIR] Allow overriding isSSA, noPhis, noVRegs in MIR input (#108546)Dominik Montada1-11/+41
2024-09-19[LLVM] Use {} instead of std::nullopt to initialize empty ArrayRef (#109133)Jay Foad1-1/+1
2024-05-01[MIR] Serialize MachineFrameInfo::isCalleeSavedInfoValid() (#90561)David Tellenbach1-0/+1
2024-04-30[NewPM][CodeGen] Add `MachineFunctionAnalysis` (#88610)paperchalice1-12/+36
2024-04-02[CallSiteInfo][NFC] CallSiteInfo -> CallSiteInfo.ArgRegPairs (#86842)Prabhuk1-2/+2
2024-03-11[CodeGen] Do not pass MF into MachineRegisterInfo methods. NFC. (#84770)Jay Foad1-1/+1
2024-02-03[MIRParser] Simplify a string comparison (NFC)Kazu Hirata1-1/+1
2023-10-13[llvm] Stop including llvm/ADT/StringMap.h (NFC)Kazu Hirata1-1/+0
2023-05-28use ref to avoid copy in range for-loopWang, Xin101-1/+1
2023-05-11[YamlMF] Serialize EntryValueObjectsFelipe de Azevedo Piovezan1-0/+18
2023-05-04[MIRParser][nfc] Factor out code parsing debug MD nodesFelipe de Azevedo Piovezan1-16/+37
2023-04-10[MachineOutliner] Add IsOutlined to MachineFunctionwangpc1-0/+1
2023-01-20[DebugInfo] Store instr-ref mode of MachineFunction in memberJeremy Morse1-0/+3
2023-01-12[IR] Support importing modules with invalid data layouts.Jannik Silvanus1-2/+4
2022-12-22MIR: Don't assert if a virtual register uses a non-allocatable classMatt Arsenault1-2/+11
2022-12-02[CodeGen] Use std::nullopt instead of None (NFC)Kazu Hirata1-1/+1
2022-07-17[CodeGen] Qualify auto variables in for loops (NFC)Kazu Hirata1-2/+2
2022-06-20[llvm] Don't use Optional::getValue (NFC)Kazu Hirata1-2/+2
2022-06-18[llvm] Use value_or instead of getValueOr (NFC)Kazu Hirata1-1/+1
2022-04-22MIR: Serialize FunctionContextIdx in MachineFrameInfoMatt Arsenault1-0/+9
2022-04-15MIR: Serialize a few bool function fieldsMatt Arsenault1-0/+6
2022-03-23Cleanup include: codegen second roundserge-sans-paille1-3/+0
2022-03-12Cleanup includes: DebugInfo & CodeGenserge-sans-paille1-4/+6
2022-03-01[nfc][codegen] Move RegisterBank[Info].h under CodeGenMircea Trofin1-2/+2
2022-02-06[CodeGen] Use = default (NFC)Kazu Hirata1-1/+1
2022-01-07[llvm] Remove redundant member initialization (NFC)Kazu Hirata1-2/+1
2022-01-03Revert "[llvm] Remove redundant member initialization (NFC)"Kazu Hirata1-1/+2
2022-01-01[llvm] Remove redundant member initialization (NFC)Kazu Hirata1-2/+1
generated by cgit v1.1 at 2025-08-02 07:34:03 +0000