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path: root/llvm/docs/RISCVUsage.rst
AgeCommit message (Expand)AuthorFilesLines
40 hours[RISCV] Support resumable non-maskable interrupt handlers (#148134)Gergely Futo1-1/+1
2025-07-15[RISCV] Add Andes XAndesBFHCvt (Andes Scalar BFLOAT16) extension (#148563)Jim Lin1-0/+3
2025-07-07[RISCV] Add Andes XAndesVSIntLoad (Andes Vector INT4 Load) extension (#147005)Jim Lin1-0/+3
2025-07-03[RISCV] Added the MIPS prefetch extensions for MIPS RV64 P8700. (#145647)UmeshKalappa1-0/+3
2025-06-18[RISCV] Add Andes XAndesVBFHCvt (Andes Vector BFLOAT16 Conversion) extension ...Jim Lin1-0/+3
2025-06-16[RISCV] Xqccmp v0.3 (#137854)Sam Elliott1-1/+1
2025-06-16[RISCV] Update Xqci to v0.13.0 (#144398)Sam Elliott1-17/+17
2025-06-16[RISCV] Change input register type for QC_SWM and QC_SWMI (#144294)Sudharsan Veeravalli1-1/+1
2025-05-30[RISCV] Add shlcofideleg extension (#141572)Ying Chen1-0/+1
2025-05-21[RISCV] Add MC layer support for XSfmm*. (#133031)Craig Topper1-0/+3
2025-05-21[llvm] Fix typos in documentation (#140844)Kazu Hirata1-1/+1
2025-05-20[Docs][RISCV] Move Zilsd to 'Supported' status. NFC (#140757)Craig Topper1-1/+1
2025-05-15[RISCV][MC] Add support for Q extension (#139369)Iris Shi1-0/+1
2025-05-15[RISCV] Add Andes XAndesVDot (Andes Vector Dot Product) extension. (#139849)Jim Lin1-0/+3
2025-05-13[RISCV] Xqci Extensions v0.11.0 (#137881)Sam Elliott1-20/+20
2025-05-12[RISCV][Docs] Correct links to Xmipscmov and Xmipslsp specifications. NFCCraig Topper1-2/+2
2025-05-12[RISCV] Add Andes XAndesVPackFPH (Andes Vector Packed FP16) extension. (#138827)Jim Lin1-0/+3
2025-05-07[RISCV] Fix the link to the XAndesPerf specification. NFC (#138804)Craig Topper1-1/+1
2025-04-28[RISCV] Add Andes XAndesperf (Andes Performance) extension. (#135110)Jim Lin1-0/+3
2025-04-25[RISCV] Add support for Ziccamoc (#136694)T-Tie1-1/+2
2025-04-22[RISCV] Add smcntrpmf extension (#136556)Liao Chunyu1-0/+1
2025-04-15[RISCV] Fix xmipscmov extension name (#135647)Djordje Todorovic1-1/+1
2025-03-28[RISCV] Add Qualcomm uC Xqciio (External Input Output) extension (#132721)quic_hchandel1-0/+3
2025-03-22Recommit "[RISCV] Add Qualcomm uC Xqcisync (Sync Delay) extension (#132184)" ...Sudharsan Veeravalli1-0/+3
2025-03-21Revert "[RISCV] Add Qualcomm uC Xqcisync (Sync Delay) extension (#132184)"Kazu Hirata1-3/+0
2025-03-22[RISCV] Add Qualcomm uC Xqcisync (Sync Delay) extension (#132184)quic_hchandel1-0/+3
2025-03-20[RISCV] Add assembler support for Zvqdotq. (#132118)Craig Topper1-0/+3
2025-03-20[RISCV] Add Qualcomm uC Xqcilb (Long Branch) extension (#131996)quic_hchandel1-0/+3
2025-03-19[RISCV] Add Zilsd and Zclsd Extensions (#131094)dong-miao1-0/+2
2025-03-18[RISCV] Add Qualcomm uC Xqcisim (Simulation Hint) extension (#128833)Sudharsan Veeravalli1-0/+3
2025-03-18[RISCV] Add Qualcomm uC Xqcibi (Branch Immediate) extension (#130779)quic_hchandel1-0/+3
2025-03-13[RISCV] Add Qualcomm uC Xqcili (load large immediates) extension (#130012)u4f31-0/+3
2025-03-11[RISCV] Update to Xqciint v0.4 (#130219)Sam Elliott1-1/+1
2025-03-06[RISCV] Add Qualcomm uC Xqcibm (Bit Manipulation) extension (#129504)users/mariusz-sikora-at-amd/testquic_hchandel1-0/+3
2025-02-26[RISCV] Add Xqccmp 0.1 Assembly Support (#128731)Sam Elliott1-0/+3
2025-02-26[RISCV][Docs] RISCV -> RISC-V in RISCVUsage.rst. NFC (#128906)Craig Topper1-1/+1
2025-02-26[RISCV][MC] Add assembler support for XRivosVisni (#128773)Philip Reames1-0/+3
2025-02-26[RISCV] Xqcia 0.4 The spec was recently updated, this changes the name in the...Luke Quinn1-1/+1
2025-02-25[RISCV] Change the vendor prefix for Rivos from "rv." to "ri." (#128761)Philip Reames1-0/+3
2025-02-24[RISCV] Add Qualcomm uC Xqcilia (Large Immediate Arithmetic) extension (#124706)quic_hchandel1-0/+3
2025-01-28[RISCV] Add MIPS extensions (#121394)Djordje Todorovic1-0/+6
2025-01-27[RISCV] Renaming muladdi to muliadd as per v0.5 spec. (#124237)quic_hchandel1-1/+1
2025-01-23[RISCV] Add Qualcomm uC Xqcilo (Large Offset Load Store) extension (#123881)quic_hchandel1-0/+3
2025-01-13[RISCV] Add Qualcomm uC Xqciint (Interrupts) extension (#122256)quic_hchandel1-0/+3
2025-01-07[RISCV] Add Qualcomm uC Xqcicm (Conditional Move) extension (#121752)quic_hchandel1-0/+3
2025-01-03[RISCV] Add support of Sdext,Sdtrig extentions (#120936)Shao-Ce SUN1-0/+3
2025-01-03[RISCV] Add Qualcomm uC Xqcicli (Conditional Load Immediate) extension (#121292)Sudharsan Veeravalli1-0/+3
2024-12-29[RISCV] Add Qualcomm uC Xqciac (Load-Store Adress calculation) extension (#12...quic_hchandel1-0/+3
2024-12-14[RISCV] Add Qualcomm uC Xqcilsm (Load Store Multiple) extension (#119823)Sudharsan Veeravalli1-0/+3
2024-12-12[RISCV] Add Qualcomm uC Xqcics(Conditional Select) extension (#119504)quic_hchandel1-0/+3
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