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12 hours[NFC] [Doc] Fix text codeblock being declared llvm (#184461)Florian Mayer1-1/+1
12 hours[NFC] [doc] fix invalid comment syntax in IR (#184457)Florian Mayer1-1/+1
16 hours[Analysis][DXILResource] Correct bound computation (#184198)Finn Plummer1-1/+1
26 hours[NFC][Docs] Add documentation for NVPTX conversion intrinsics (#175536)Srinivasa Ravi1-0/+177
26 hours[LangRef] Mention allocation elision (#177592)Nikita Popov1-0/+13
39 hours[lldb][ARM] Support thread local variables on ARM Linux (#181315)Igor Kudrin1-0/+1
45 hours[TableGen] Allow specification of underlying type for GenericEnum (#183769)Nick Sarnie1-1/+6
46 hours[CMake] Add LLVM_ENABLE_WARNING_SUPPRESSIONS to toggle warning suppressions (...Shaojie Zhu1-0/+5
2 days[LangRef] Clarify nsz semantics (#180906)Nikita Popov1-3/+3
4 days[lldb][Process/FreeBSDKernelCore] Add riscv64 support (#180670)Minsoo Choo1-1/+1
4 days[lldb][Process/FreeBSDKernelCore] Add ppc64le support (#180669)Minsoo Choo1-1/+1
5 days[lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (#183553)Minsoo Choo1-0/+4
5 days[LangRef] Clarify in vscale_range that vscale is a power-of-two without the a...Luke Lau1-1/+1
6 days[NVPTX] Support intrinsics for reserved shared memory special registers (#182...yasmincs1-0/+36
6 days[llvm/docs] Add advanced RTTI techniques to HowToSetUpLLVMStyleRTTI (#181863)Lidong Yan1-7/+40
6 days[AMDGPU] Add attribute for FWD_PROGRESS (#181675)David Stuttard1-0/+4
6 daysRevert "[lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory()" (#183485)David Spickett1-2/+0
6 days[RISCV] Add processor definitions for XuanTie C910V2 and C920V2 (#174056)Wang Yaduo1-0/+1
7 days[AMDGPU] Add gfx12-5-generic subtarget (#183381)Stanislav Mekhanoshin1-0/+7
7 days[lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (#183237)Minsoo Choo1-0/+2
7 days[RISCV] Remove -riscv-enable-p-ext-simd-codegen (#183156)Craig Topper1-0/+1
7 days[lldb][Process/FreeBSDKernel] Add arm support (#180674)Minsoo Choo1-0/+1
7 daysllvm: Delete bugpoint (#182320)Matt Arsenault7-429/+7
8 days[LLVM][LangRef] Restrict vscale to be a signed power-of-two integer. (#183080)Paul Walker1-5/+5
8 days[lldb][Process/FreeBSDKernel] Rename to FreeBSDKernelCore (#182878)Minsoo Choo1-0/+2
8 days[IR] Specify alloca with poison element count (#183072)Aiden Grossman1-0/+3
8 days[RISCV][llvm] Rename zvqdotq to zvdot4a8i (#179393)Brandon Wu1-2/+2
9 days[lldb][ARM] Support reading the thread pointer register on ARM Linux (#182438)Igor Kudrin1-0/+4
10 days[llvm] Remove the docs for the (now removed) LLVM test-suite Makefiles (#179288)Louis Dionne4-223/+0
10 days[lldb][Process/FreeBSDKernel] Print unread message buffer on start (#178027)Minsoo Choo1-0/+2
11 days[ARM] support `r14` as an alias for `lr` in inline assembly (#179740)Folkert de Vries1-0/+4
12 daysIR: Add prefalign attribute for function definitions.Peter Collingbourne1-8/+19
12 daystools: Restore PluginLoader to llc (#182455)Matt Arsenault1-0/+6
12 daysReland "[llvm-readobj] Dump callgraph section info for ELF" (#176260)Prabhu Rajasekaran2-0/+16
13 days[LFI] Add MCLFIRewriter infrastructure (#172906)Zachary Yedidia1-0/+27
13 daysAMDGPU/Docs: Reserve 0x060 and 0x070 ELF MACH (e_flags) (#182341)Konstantin Zhuravlyov1-0/+2
13 days[lldb][Process/FreeBSDKernel] Remove libfbsdvmcore support (#181283)Minsoo Choo1-0/+3
13 daysdocs: Delete incorrect code generation section of HowToSubmitABug (#182315)Matt Arsenault1-68/+0
13 daystools: Remove untested PluginLoader includes (#117644)Matt Arsenault2-11/+0
13 daysdocs: Update HowToSubmitABug to use llvm-reduce instead of bugpoint (#182310)Matt Arsenault2-34/+37
13 days[AArch64][llvm] Remove `+d128` gating on `sysp`, `msrr` and `mrrs` instructio...Jonathan Thackray1-0/+3
13 days[AMDGPU][Doc] Small fix for GFX12 release atomic memory model doc (#182241)Pierre van Houtryve1-1/+1
13 days[lldb] Drop incomplete non-8-bit bytes support (#182025)Sergei Barannikov1-0/+5
14 days[CodeGen] Refactor register operand parsing in MI parser (#181748)Rahul Joshi1-2/+5
2026-02-16[tsan] Introduce Adaptive Delay Scheduling to TSAN (#178836)Chris Cotter1-0/+2
2026-02-15[RFC][IR] Remove `Constant::isZeroValue` (#181521)Shilei Tian1-0/+6
2026-02-14[RISCV] Add SpacemiT A100 processor definition (#174052)Mark Zhuang1-0/+1
2026-02-13Add llvm.looptrap intrinsic.Peter Collingbourne1-0/+22
2026-02-12[ReleaseNotes] Create subheader for LLDB/FreeBSD (#181000)Minsoo Choo1-2/+11
2026-02-12Reapply "[MC][TableGen] Expand Opcode field of MCInstrDesc" (#180321) (#180954)sstipano1-2/+2
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