related to #2670

[prci] Fix ResetSynchronizers to use AdapterNodes instead of IdentityNodes

SynchronizerPrimitiveShiftReg: fix Dedup Issue

Bump Chisel along 3.4.x release branch

PhysicalFilter: add RegFieldDesc and scaladoc

Since we use the cycle counter to determine when to unpause, we shouldn't pause when the cycle counter doesn't count.

Support noisy drops from L1 D$

* CSR mcountinhibit

* mcountinhibit bit [1] is tied zero

* CSR.firstHPM

This reduces the latency of some inclusion and coherence misses, in exchange
for additional C-channel traffic.  It is disabled when using the broadcast
hub, because there it doesn't improve latency.

D$: support specifying the cache index when aliasing possible

Update src/main/scala/util/SynchronizerReg.scala

Update src/main/scala/util/SynchronizerReg.scala

Since the same physical address can legally live in multiple places for
caches that support aliasing, we can expose this additional degree of
freedom. It is useful for decoupled accelerators whose memory addresses
have been converted up front.  If they use the physical address directly,
then they'll often access the wrong set, causing an aliasing miss.  If
they happen to know which alias is most likely, they can use this new
mechanism to choose it.

No change for the non-aliasing case.

Identity nodes perform an initial `out <> in` assignment, which causes the outwards resets to receive assignments to both `AsyncReset` and `Bool` types.

add Select combinators

Add mill build system

BuiltInDevices: Optional instantiation of TL adapters

Improvements To AMBA AXI4 Adapters