- Aug 24, 2023
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Atish Patra authored
Each imsic region is added to the root domain. Increase the max count to allow booting more harts where M-mode imsic regions are in a separate region per hart. Signed-off-by:Atish Patra <atishp@rivosinc.com>
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- Jun 24, 2023
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Atish Patra authored
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- Jun 23, 2023
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Anup Patel authored
This patch updates OpenSBI version to 1.3 as part of release preparation. Signed-off-by:Anup Patel <apatel@ventanamicro.com>
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Gianluca Guida authored
Do not ignore register A2 (high bits of physical address) in the dbcn handler (RV64). Signed-off-by:
Gianluca Guida <gianluca@rivosinc.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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- Jun 21, 2023
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Guo Ren authored
The fdt_reset_thead driver needs to modify the __reset_thead_csr_stub text region for the secondary harts booting. After that, the sbi_hart_pmp_configure may lock down the text region with M_READABLE & M_EXECUTABLE attributes in the future. Currently, the M_READABLE & M_EXECUtABLE have no effect on m-mode, the L-bit in pmpcfg csr is useless for the current opensbi scenario. See: Priv-isa-spec 3.7.1.2. Locking and Privilege Mode When the L bit is clear, any M-mode access matching the PMP entry will succeed; the R/W/X permissions apply only to S and U modes. That's why current fdt_reset_thead could still work well after commit: 230278dc ("lib: sbi: Add separate entries for firmware RX and RW regions"). So this patch fixes up a fake bug for the M-mode permission setting of the future. Fixes: 230278dc ("lib: sbi: Add separate entries for firmware RX and RW regions") Link: http://lists.infradead.org/pipermail/opensbi/2023-June/005176.html Reported-by:
Jessica Clarke <jrtc27@jrtc27.com> Signed-off-by:
Guo Ren <guoren@linux.alibaba.com> Signed-off-by:
Guo Ren <guoren@kernel.org> Reviewed-by:
Anup Patel <anup@brainfault.org>
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Xiang W authored
After the loop to find the hartid is launched, assigning -1 to index will fail in the subsequent compare instruction bge. Fix This. Signed-off-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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- Jun 15, 2023
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Alexandre Ghiti authored
This reverts commit 6966ad0a ("platform/lib: Allow the OS to map the regions that are protected by PMP"). It was thought at the time of this commit that allowing the kernel to map PMP protected regions was safe but it is actually not: for example, the hibernation process will try to access any linear mapping page and then will fault on such mapped PMP regions [1]. Another issue is that the device tree specification [2] states that a !no-map region must be declared as EfiBootServicesData/Code in the EFI memory map which would make the PMP protected regions reclaimable by the kernel. And to circumvent this, RISC-V edk2 diverges from the DT specification to declare those regions as EfiReserved. The no-map attribute was removed to allow the kernel to use hugepages larger than 2MB to map the linear mapping to improve the performance but actually a recent talk from Mike Rapoport [3] stated that the performance benefit was marginal. For all those reasons, let's mark all the PMP protected regions as "no-map". [1] https://lore.kernel.org/linux-riscv/CAAYs2=gQvkhTeioMmqRDVGjdtNF_vhB+vm_1dHJxPNi75YDQ_Q@mail.gmail.com/ [2] "3.5.4 /reserved-memory and UEFI" https://github.com/devicetree-org/devicetree-specification/releases/download/v0.4-rc1/devicetree-specification-v0.4-rc1.pdf [3] https://lwn.net/Articles/931406/ Signed-off-by:
Alexandre Ghiti <alexghiti@rivosinc.com> Reviewed-by:
Atish Patra <atishp@rivosinc.com> Reviewed-by:
Xiang W <wxjstz@126.com>
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- Jun 14, 2023
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Anup Patel authored
Over-time a lot of organizations and individuals have contributed to the OpenSBI project so let us add copyright RISC-V International to respect the contributions from all RISC-V members. Signed-off-by:
Anup Patel <apatel@ventanamicro.com> Reviewed-by:
Andrew Jones <ajones@ventanamicro.com>
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Anup Patel authored
We do have an official OpenSBI logo which was designed few months ago and was also approved by RISC-V International. Lets add this logo under docs and also use it in the top-level README.md Signed-off-by:
Anup Patel <apatel@ventanamicro.com> Reviewed-by:
Andrew Jones <ajones@ventanamicro.com>
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- Jun 06, 2023
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Anup Patel authored
Instead of using a global array indexed by hartid, we should use scratch space to save per-HART IMSIC pointer and IMSIC file number. Signed-off-by:
Anup Patel <apatel@ventanamicro.com> Reviewed-by:
Andrew Jones <ajones@ventanamicro.com>
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- Jun 05, 2023
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Anup Patel authored
The imsic_map_hartid_to_data() already checks hartid before using so we don't need to check in imsic_update_hartid_table(). Signed-off-by:
Anup Patel <apatel@ventanamicro.com> Reviewed-by:
Andrew Jones <ajones@ventanamicro.com>
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Anup Patel authored
Instead of using a global array indexed by hartid, we should use scratch space to save per-HART PLIC pointer and PLIC context numbers. Signed-off-by:
Anup Patel <apatel@ventanamicro.com> Reviewed-by:
Andrew Jones <ajones@ventanamicro.com>
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Anup Patel authored
Instead of using a global array indexed by hartid, we should use scratch space to save per-HART MTIMER pointer. Signed-off-by:
Anup Patel <apatel@ventanamicro.com> Reviewed-by:
Andrew Jones <ajones@ventanamicro.com>
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Anup Patel authored
Instead of using a global array indexed by hartid, we should use scratch space to save per-HART MSWI pointer. Signed-off-by:
Anup Patel <apatel@ventanamicro.com> Reviewed-by:
Andrew Jones <ajones@ventanamicro.com>
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Anup Patel authored
Let's use heap allocation in FDT domain parsing instead of using a fixed size global array. Signed-off-by:
Anup Patel <apatel@ventanamicro.com> Reviewed-by:
Andrew Jones <ajones@ventanamicro.com>
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Anup Patel authored
Let's use heap allocation in ACLINT MTIMER driver instead of using a fixed size global array. Signed-off-by:
Anup Patel <apatel@ventanamicro.com> Reviewed-by:
Andrew Jones <ajones@ventanamicro.com>
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Anup Patel authored
Let's use heap allocation in PLIC, APLIC, and IMSIC irqchip drivers instead of using a fixed size global array. Signed-off-by:
Anup Patel <apatel@ventanamicro.com> Reviewed-by:
Andrew Jones <ajones@ventanamicro.com>
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Anup Patel authored
Let's use heap allocation in ACLINT MSWI driver instead of using a fixed size global array. Signed-off-by:
Anup Patel <apatel@ventanamicro.com> Reviewed-by:
Andrew Jones <ajones@ventanamicro.com>
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Anup Patel authored
Let's use heap allocation in DesignWare and SiFive I2C drivers instead of using a fixed size global array. Signed-off-by:
Anup Patel <apatel@ventanamicro.com> Reviewed-by:
Andrew Jones <ajones@ventanamicro.com>
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Anup Patel authored
Let's use heap allocation in SiFive and Starfive GPIO drivers instead of using a fixed size global array. Signed-off-by:
Anup Patel <apatel@ventanamicro.com> Reviewed-by:
Andrew Jones <ajones@ventanamicro.com>
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Anup Patel authored
Instead of using a global array indexed by hartid, we should use scratch space to save per-HART domain pointer. Signed-off-by:
Anup Patel <apatel@ventanamicro.com> Reviewed-by:
Andrew Jones <ajones@ventanamicro.com>
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Anup Patel authored
Let's use heap allocation in root domain creation instead of using a fixed size global array. Signed-off-by:
Anup Patel <apatel@ventanamicro.com> Reviewed-by:
Andrew Jones <ajones@ventanamicro.com>
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Anup Patel authored
Instead of using a global array for per-HART PMU state, we should use heap to on-demand allocate per-HART PMU state when the HART is initialized in cold boot or warm boot path. Signed-off-by:
Anup Patel <apatel@ventanamicro.com> Reviewed-by:
Andrew Jones <ajones@ventanamicro.com>
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Anup Patel authored
The scratch space being a scarce resource so let us print it's size and usage at boot time. Signed-off-by:
Anup Patel <apatel@ventanamicro.com> Reviewed-by:
Andrew Jones <ajones@ventanamicro.com>
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Anup Patel authored
We provide simple heap allocator to manage the heap space provided by OpenSBI firmware and platform. Signed-off-by:
Anup Patel <apatel@ventanamicro.com> Reviewed-by:
Andrew Jones <ajones@ventanamicro.com>
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Anup Patel authored
We extend struct sbi_platform and struct sbi_scratch to allow platforms specify the heap size to the OpenSBI firmwares. The OpenSBI firmwares will use this information to determine the location of heap and provide heap base address in per-HART scratch space. Signed-off-by:
Anup Patel <apatel@ventanamicro.com> Reviewed-by:
Andrew Jones <ajones@ventanamicro.com>
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Anup Patel authored
Reading and writing a data type in scratch space is a very common use-case so let us add related helper macros in sbi_scratch.h. Signed-off-by:Anup Patel <apatel@ventanamicro.com>
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- Jun 04, 2023
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Andrew Jones authored
The spec says sbi_system_suspend() will return SBI_ERR_INVALID_PARAM when "sleep_type is reserved or is platform-specific and unimplemented" and SBI_ERR_NOT_SUPPORTED when sleep_type "is not reserved and is implemented, but the platform does not support it due to one or more missing dependencies." Ensure SBI_ERR_INVALID_PARAM is returned for reserved sleep types and that the system suspend driver can choose which of the two error types to return itself by returning an error from its check function rather than a boolean. Signed-off-by:
Andrew Jones <ajones@ventanamicro.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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Heinrich Schuchardt authored
The parameter checks in aclint_mswi_cold_init() don't guard against a buffer overrun. mswi_hartid2data is defined as an array of SBI_HARTMASK_MAX_BITS entries. The current check allows mswi->hart_count = ACLINT_MSWI_MAX_HARTS mswi->first_hartid = SBI_HARTMASK_MAX_BITS - 1. With these values mswi_hartid2data will be accessed at index SBI_HARTMASK_MAX_BITS + SBI_HARTMASK_MAX_BITS - 2. We have to check the sum of mswi->first_hartid and mswi->hart_count. Furthermore mswi->hart_count = 0 would not make much sense. Addresses-Coverity-ID: 1529705 ("Out-of-bounds write") Fixes: 5a049fe1 ("lib: utils/ipi: Add ACLINT MSWI library") Signed-off-by:Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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- May 26, 2023
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Xiang W authored
Remove dummy driver. Optimize fdt_timer_cold_init to exit the loop early. Signed-off-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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Xiang W authored
Remove dummy driver. Optimize fdt_ipi_cold_init to exit the loop early. Signed-off-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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Xiang W authored
A final check of all DT nodes does not necessarily find a match, so SBI_ENODEV needs to be returned. Optimize removal of current_driver. Signed-off-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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Xiang W authored
console is not a required peripheral. So it should return success when the console does not exist. Signed-off-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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- May 23, 2023
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Atish Patra authored
The current sanity check expect M-mode IMSIC files to be in a separate region which is only true if a platform supports PMP. Any platforms without PMP support may keep M-mode IMSIC file along with S-mode/VS-mode files. Signed-off-by:Atish Patra <atishp@rivosinc.com>
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Atish Patra authored
Signed-off-by:Atish Patra <atishp@rivosinc.com>
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- May 22, 2023
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Filip Filmar authored
Adds the `-L` flag (follow symlinks) to the `cp` commands used to install `libsbi.a` and `include/sbi/*`. This should make no difference in regular compilation. However, it does make a difference when compiling with bazel. Namely, bazel's sandboxing will turn all the source files into symlinks. After installation with `cp` the destination files will be symlinks pointing to the sandbox symlinks. As the sandbox files are removed when compilation ends, the just-copied symlinks become dangling symlinks. The resulting include files will be unusable due to the dangling symlink issues. Adding `-L` when copying ensures that the files obtained by executing the `install` targets are always dereferenced to files, rather than symlinks, eliminating this issue. Signed-off-by:
Filip Filmar <fmil@google.com> Reviewed-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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- May 21, 2023
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Andrew Jones authored
With the introduction of the register_extensions callback the range members (extid_start and extid_end) may now change and it has become a bit subtle as to when a probe function should be implemented. Document all the members and their relationship to the register_extensions callback. Signed-off-by:
Andrew Jones <ajones@ventanamicro.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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Andrew Jones authored
When a probe implementation just returns zero for not available and one for available then we don't need it, as the extension won't be registered at all if it would return zero and the Base extension probe function will already set out_val to 1 if not probe function is implemented. Currently all probe functions only return zero or one, so remove them all. Signed-off-by:
Andrew Jones <ajones@ventanamicro.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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Xiang W authored
No need to do a fully comprehensive count, just find a supported reset or suspend type Signed-off-by:
Xiang W <wxjstz@126.com> Signed-off-by:
Andrew Jones <ajones@ventanamicro.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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Andrew Jones authored
When an extension implements a probe function it means there's a chance that the extension is not available. Use this function in the register_extensions callback to determine if the extension should be registered at all. Where the probe implementation is simple, just open code the check. Signed-off-by:
Andrew Jones <ajones@ventanamicro.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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