* gcc/config/riscv/corev.def: Updated HI and QI to UHI and UQI.
	* gcc/config/riscv/corev.md: Updated predicate and constraint
	  from signed to unsigned.
	* gcc/doc/extend.texi: Updated documentation.
	* gcc/testsuite/gcc.target/riscv/cv-simd-avgu-sc-b-compile-1.c:
	  Updated tests.
	* gcc/testsuite/gcc.target/riscv/cv-simd-avgu-sc-h-compile-1.c:
	  Likewise.

Signed-off-by: Nandni Jamnadas <nandni.jamnadas@embecosm.com>

	Updated cv.pack and cv.pack.h builtins from
	__builtin_riscv_cv_simd_pack_h and __builtin_riscv_cv_simd_pack_h to
	__builtin_riscv_cv_simd_packlo_h and __builtin_riscv_cv_simd_packhi_h
	respectively.

	* gcc/config/riscv/corev.def: Updated builtin and insn name.
	* gcc/config/riscv/corev.md: Updated machine description insn name.
	* gcc/doc/extend.texi: Updated documentation.
	* gcc/testsuite/gcc.target/riscv/cv-simd-pack-compile-1.c: Updated tests.
	* gcc/testsuite/gcc.target/riscv/cv-simd-pack-h-compile-1.c: Likewise
	* gcc/testsuite/gcc.target/riscv/cv-xcvsimd-march-compile-1.c: Likewise.

Signed-off-by: Nandni Jamnadas <nandni.jamnadas@embecosm.com>

    Changed operand order from rd,rs1,Is3,Is2 to
    rd,rs1,Is2,Is3 for cv.bitrev to match the CORE-V
    Builtin Specifcation.

    * gcc/config/riscv/corev.md: Changed operand order for bitrev.
    * gcc/testsuite/gcc.target/riscv/
      cv-march-xcvbitmanip-compile-bitrev.c: Updated dg-final directives
      to match output.

Signed-off-by: Nandni Jamnadas <nandni.jamnadas@embecosm.com>

    Updated __builtin_riscv_cv_elw_elw to take in a void pointer as an arguement
    to match the CORE-V builtin specifcation.

    * gcc/config/riscv/corev.def: Changed builtin argument to take a void
      pointer.
    * gcc/testsuite/gcc.target/riscv/cv-elw-elw-compile-1.c: Updated
      builtin test to take in a void pointer.

Signed-off-by: Nandni Jamnadas <nandni.jamnadas@embecosm.com>

    * gcc/testsuite/gcc.target/riscv: Updated all XCV tests to
      remove explict call of versioning in march string.

Signed-off-by: Nandni Jamnadas <nandni.jamnadas@embecosm.com>

Adds support for __attribute__((interrupt("corev-fast", mode))), where
mode is optional and is one of "machine", "supervisor" or "user".

CORE-V fast interrupt functions behave the same as standard RISC-V
interrupt functions except they do not save caller saved registers
(including ra, which the RISC-V ABI defines as caller saved but gcc
treats as callee saved).

gcc/ChangeLog:

	* config/riscv/riscv.cc (struct machine_function): Replace
	interrupt_mode with interrupt_type.
	(struct riscv_interrupt_type): New.
	(riscv_attribute_table): Alllow two arguments in interrupt
	attribute.
	(riscv_handle_type_attribute): Handle optional corev-fast
	argument.
	(riscv_save_reg_p): Do not save caller saved registers for
	interrupt functions if interrupt_type.save_call_used_p is false.
	(riscv_compute_frame_info): Do not save prologue temporary
	register for interrupt functions if
	interrupt_type.save_call_used_p is false.
	(riscv_expand_epilogue): Replace interrupt_mode with
	interrupt_type.mode.
	(riscv_epilogue_uses): Do not add uses for caller saved
	registers if interrupt_type.save_call_used_p is false.
	(riscv_get_interrupt_type): Construct and return a
	riscv_interrupt_type instead of riscv_privilege_levels.
	(riscv_set_current_function): Set interrupt_type intead of
	interrupt_mode.  Check interrupt_type.mode instead of
	interrupt_type.
	(riscv_merge_decl_attributes): Change riscv_privilege_levels
	to riscv_interrupt_type.  Add check for matching
	save_call_used_p.
	* doc/extend.texi: Document new optional "corev-fast" parameter
	to RISC-V interrupt attribute.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/interrupt-5.c: Update dg-warning text.
	* gcc.target/riscv/cv-interrupt-1.c: New test.
	* gcc.target/riscv/cv-interrupt-2.c: New test.
	* gcc.target/riscv/cv-interrupt-3.c: New test.
	* gcc.target/riscv/cv-interrupt-4.c: New test.
	* gcc.target/riscv/cv-interrupt-5.c: New test.
	* gcc.target/riscv/cv-interrupt-all-f-1.c: New test.
	* gcc.target/riscv/cv-interrupt-all-f-2.c: New test.
	* gcc.target/riscv/cv-interrupt-all-x-1.c: New test.
	* gcc.target/riscv/cv-interrupt-all-x-2.c: New test.
	* gcc.target/riscv/cv-interrupt-all-x-3.c: New test.
	* gcc.target/riscv/cv-interrupt-all-x-4.c: New test.
	* gcc.target/riscv/cv-interrupt-conflict-type.c: New test.
	* gcc.target/riscv/cv-interrupt-debug.c: New test.
	* gcc.target/riscv/cv-interrupt-mmode.c: New test.
	* gcc.target/riscv/cv-interrupt-smode.c: New test.
	* gcc.target/riscv/cv-interrupt-umode.c: New test.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/cv-march-xcvmac-test-autogeneration-mac.c:
	Replace -02 with -O2.
	* gcc.target/riscv/cv-march-xcvmac-test-autogeneration-msu.c:
	Likewise.

* gcc/config/riscv/corev.md: update the builtins patterns.
*
gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-test-autogeneration-mac.c:
test for autogeneration.
*
gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-test-autogeneration-msu.c:
Likewise.

    * gcc/common/config/riscv/riscv-common.cc: Created XCVBI extension
      support.
    * gcc/config/riscv/riscv-opts.h: Created MASK and TARGET macros for
      XCVBI.
    * gcc/config/riscv/corev.md: Implemented cv_branch<mode> pattern
      for cv.beqimm and cv.bneimm.
    * gcc/config/riscv/riscv.md: Changed pattern priority so corev.md
      patterns run before riscv.md patterns.
    * gcc/config/riscv/constraints.md: Implemented constraints
      BI5 - signed 5-bit immediate.
    * gcc/config/riscv/predicates.md: Implemented predicate
      const_int5s_operand - signed 5 bit immediate.
    * gcc/testsuite/gcc.target/riscv/cv-bi-beqimm-compile-1.c:
      Testing auto-generation for instruction cv.beqimm at all
      optimisation levels.
    * gcc/testsuite/gcc.target/riscv/cv-bi-beqimm-compile-2.c:
      Boundary testing for instruction cv.beqimm at all
      optimisation levels.
    * gcc/testsuite/gcc.target/riscv/cv-bi-bneimm-compile-1.c:
      Testing auto-generation for instruction cv.bneimm at all
      optimisation levels.
    * gcc/testsuite/gcc.target/riscv/cv-bi-bneimm-compile-2.c:
      Boundary testing for instruction cv.bneimm at all
      optimisation levels.

Fix to issue #32.

gcc/config/riscv:
  * corev.md: Changed operand order from rd,rs1,Is3,Is2 to
    rd,rs1,Is2,Is3 for cv.bset, cv.bclr, cv.insert, cv.extractu,
    and cv.extract. This now matches the specification.

gcc/testsuite/gcc.target/riscv:
  * cv-march-xcvbitmanip-compile-bclr.c: Updated test to match spec.
  * cv-march-xcvbitmanip-compile-bset.c: Likewise.
  * cv-march-xcvbitmanip-compile-extract.c: Likewise.
  * cv-march-xcvbitmanip-compile-extractu.c: Likewise.
  * cv-march-xcvbitmanip-compile-insert.c: Likewise.

	* gcc/config/riscv/corev.md: Changes in the output templates
	  to generate correct assemble operands.

Add Zcmp extension testcases, zcmpe means Zcmp with RVE extension.

Co-Authored by: Nandni Jamnadas <nandni.jamnadas@embecosm.com>
Co-Authored by: Yulong Shi <yulong@iscas.ac.cn>
Co-Authored by: Shihua Liao <shihua@iscas.ac.cn>
Co-Authored by: Sinan Lin <sinan.lin@linux.alibaba.com>

gcc/testsuite/ChangeLog:

        * gcc.target/riscv/zc-zcmp-push-pop-1.c: New test.
        * gcc.target/riscv/zc-zcmp-push-pop-2.c: New test.
        * gcc.target/riscv/zc-zcmp-push-pop-3.c: New test.
        * gcc.target/riscv/zc-zcmp-push-pop-4.c: New test.
        * gcc.target/riscv/zc-zcmp-push-pop-5.c: New test.
        * gcc.target/riscv/zc-zcmp-push-pop-6.c: New test.
        * gcc.target/riscv/zc-zcmp-push-pop-7.c: New test.
        * gcc.target/riscv/zc-zcmpe-push-pop-1.c: New test.
        * gcc.target/riscv/zc-zcmpe-push-pop-2.c: New test.
        * gcc.target/riscv/zc-zcmpe-push-pop-3.c: New test.
        * gcc.target/riscv/zc-zcmpe-push-pop-4.c: New test.
        * gcc.target/riscv/zc-zcmpe-push-pop-5.c: New test.
        * gcc.target/riscv/zc-zcmpe-push-pop-6.c: New test.
        * gcc.target/riscv/zc-zcmpe-push-pop-7.c: New test.

Add all ZC* extensions march args tests.

Co-Authored by: Nandni Jamnadas <nandni.jamnadas@embecosm.com>
Co-Authored by: Jiawei <jiawei@iscas.ac.cn>

	* gcc.target/riscv/zc-zca-arch.c: New test for march args
	being passed from compiler to assembler.
	* gcc.target/riscv/zc-zcb-arch.c: Likewise.
	* gcc.target/riscv/zc-zcb-m-arch.c: Likewise.
	* gcc.target/riscv/zc-zcb-zba-arch.c: Likewise.
	* gcc.target/riscv/zc-zcf-arch.c: Likewise.
	* gcc.target/riscv/zc-zcf-zbb-arch.c: Likewise.
	* gcc.target/riscv/zc-zcmp-arch.c: Likewise.
	* gcc.target/riscv/zc-zcmpe-arch.c: Likewise.
	* gcc.target/riscv/zc-zcmt-arch.c: Likewise.

Add Zcmp extension instructions support. Generate push/pop
with follow steps:

  1. preprocessing:
    1.1. if there is no push rtx, then just return. e.g.
    (note 5 1 22 2 [bb 2] NOTE_INSN_BASIC_BLOCK)
    (insn/f 22 5 23 2 (set (reg/f:SI 2 sp)
      (plus:SI (reg/f:SI 2 sp)
        (const_int -32 [0xffffffffffffffe0])))
    (nil))
    (note 23 22 2 2 NOTE_INSN_PROLOGUE_END)
    1.2. if push rtx exists, then we compute the number of
    pushed s-registers, n_sreg.

  push rtx should be find before NOTE_INSN_PROLOGUE_END tag

  [2 and 3 happend simultaneously]

  2. find valid move pattern, mv sN, aN, where N < n_sreg,
    and aN is not used the move pattern, and sN is not
    defined before the move pattern (from prologue to the
    position of move pattern).

  3. analysis use and reach of every instruction from prologue
    to the position of move pattern.
    if any sN is used, then we mark the corresponding argument list
    candidate as invalid.
    e.g.
        push  {ra,s0-s3}, {}, -32
        sw      s0,44(sp) # s0 is used, then argument list is invalid
        mv      a0,a5     # a0 is defined, then argument list is invalid
        ...
        mv      s0,a0
        mv      s1,a1
        mv      s2,a2

  4. if there is a valid argument list, then replace the pop
    push parallel insn, and delete mv pattern.
     if not, skip.

All "zcmpe" means Zcmp with RVE extension.
The push/pop instrunction implement is mostly finished by Sinan Lin.

Co-Authored by: Sinan Lin <sinan.lin@linux.alibaba.com>
Co-Authored by: Simon Cook <simon.cook@embecosm.com>
Co-Authored by: Shihua Liao <shihua@iscas.ac.cn>

gcc/ChangeLog:

        * config.gcc: New object.
        * config/riscv/predicates.md (riscv_stack_push_operation):
	  New predicate.
        (riscv_stack_pop_operation): Ditto.
        (pop_return_value_constant): Ditto.
        * config/riscv/riscv-passes.def (INSERT_PASS_AFTER): New pass.
        * config/riscv/riscv-protos.h (riscv_output_popret_p):
	  New routine.
        (riscv_valid_stack_push_pop_p): Ditto.
        (riscv_check_regno): Ditto.
        (make_pass_zcmp_popret): New pass.
        * config/riscv/riscv.cc (struct riscv_frame_info): New variable.
        (riscv_output_popret_p): New function.
        (riscv_print_pop_size): Ditto.
        (riscv_print_reglist): Ditto.
        (riscv_print_operand): New case symbols.
        (riscv_save_push_pop_count): New function.
        (riscv_push_pop_base_sp_adjust): Ditto.
        (riscv_use_push_pop): Ditto.
        (riscv_compute_frame_info): Adjust frame value.
        (riscv_emit_pop_insn): New function.
        (riscv_check_regno): Ditto.
        (riscv_valid_stack_push_pop_p): Ditto.
        (riscv_emit_push_insn): Ditto.
        (riscv_expand_prologue): Modify frame pattern.
        (riscv_expand_epilogue): Ditto.
        * config/riscv/riscv.h (RETURN_VALUE_REGNUM):
        (RISCV_ZCE_PUSH_POP_MASK): New mask.
        (RISCV_ZCMPE_PUSH_POP_MASK): Ditto.
        * config/riscv/riscv.md: Add new reg number and include info.
        * config/riscv/t-riscv: New object rules.
        * config/riscv/riscv-zcmp-popret.cc: New file.
        * config/riscv/zc.md: New file.

This patch enables the compressible features with ZC* extensions.

Since all ZC* extension depends on the Zca extension, it's sufficient to only
add the target Zca to extend the target RVC.

Co-Authored by: Nandni Jamnadas <nandni.jamnadas@embecosm.com>
Co-Authored by: Simon Cook <simon.cook@embecosm.com>

gcc/ChangeLog:

        * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins):
	  Enable compressed builtins when ZC* extensions enabled.
        * config/riscv/riscv-shorten-memrefs.cc:
	  Enable shorten_memrefs pass when ZC* extensions enabled.
        * config/riscv/riscv.cc (riscv_compressed_reg_p):
	  Enable compressible registers when ZC* extensions enabled.
        (riscv_rtx_costs):
	  Allow adjusting rtx costs when ZC* extensions enabled.
        (riscv_address_cost):
	  Allow adjusting address cost when ZC* extensions enabled.
        (riscv_first_stack_step):
	  Allow compression of the register saves without
	  adding extra instructions.
        * config/riscv/riscv.h (FUNCTION_BOUNDARY):
	  Adjusts function boundary to 16 bits when ZC* extensions enabled.

This patch is the minimal support for ZC* extensions, include the extension
name, mask and target defination. Also define the dependencies with Zca
and Zce extension. Notes that all ZC* extensions depend on the Zca extension.
Zce includes all relevant ZC* extensions for microcontrollers using.

Co-Authored by: Charlie Keaney <charlie.keaney@embecosm.com>
Co-Authored by: Nandni Jamnadas <nandni.jamnadas@embecosm.com>
Co-Authored by: Simon Cook <simon.cook@embecosm.com>

gcc/ChangeLog:

        * common/config/riscv/riscv-common.cc: New extensions.
        * config/riscv/riscv-opts.h (MASK_ZCA): New mask.
        (MASK_ZCB): Ditto.
        (MASK_ZCE): Ditto.
        (MASK_ZCF): Ditto.
        (MASK_ZCD): Ditto.
        (MASK_ZCMP): Ditto.
        (MASK_ZCMT): Ditto.
        (TARGET_ZCA): New target.
        (TARGET_ZCB): Ditto.
        (TARGET_ZCE): Ditto.
        (TARGET_ZCF): Ditto.
        (TARGET_ZCD): Ditto.
        (TARGET_ZCMP): Ditto.
        (TARGET_ZCMT): Ditto.
        * config/riscv/riscv.opt: New target variable.

Files Changed:
gcc/common/config/riscv:
 * riscv-common.cc: Added the XCVALU extension.

gcc/doc:
 * extend.texi: Added XCVALU builtin documentation.

gcc/config/riscv:
 * corev.def: Added builtins for the XCVALU extension.
 * corev.md: Likewise.
 * constraints.md: Likewise.
 * predicates.md: Likewise.
 * riscv-builtins.cc: Likewise.
 * riscv-ftypes.def: Likewise.
 * riscv-opts.h: Likewise.

gcc/testsuite/gcc.target/riscv:
 * cv-march-xcvalu-compile-addn.c: Added new tests.
 * cv-march-xcvalu-compile-addnr.c: Likewise.
 * cv-march-xcvalu-compile-addrn.c: Likewise.
 * cv-march-xcvalu-compile-addrnr.c: Likewise.
 * cv-march-xcvalu-compile-addun.c: Likewise.
 * cv-march-xcvalu-compile-addunr.c: Likewise.
 * cv-march-xcvalu-compile-addurn.c: Likewise.
 * cv-march-xcvalu-compile-addurnr.c: Likewise.
 * cv-march-xcvalu-compile-clip.c: Likewise.
 * cv-march-xcvalu-compile-clipr.c: Likewise.
 * cv-march-xcvalu-compile-clipu.c: Likewise.
 * cv-march-xcvalu-compile-clipur.c: Likewise.
 * cv-march-xcvalu-compile-extbs.c: Likewise.
 * cv-march-xcvalu-compile-extbz.c: Likewise.
 * cv-march-xcvalu-compile-exths.c: Likewise.
 * cv-march-xcvalu-compile-exthz.c: Likewise.
 * cv-march-xcvalu-compile-max.c: Likewise.
 * cv-march-xcvalu-compile-maxu.c: Likewise.
 * cv-march-xcvalu-compile-min.c: Likewise.
 * cv-march-xcvalu-compile-minu.c: Likewise.
 * cv-march-xcvalu-compile-slet.c: Likewise.
 * cv-march-xcvalu-compile-sletu.c: Likewise.
 * cv-march-xcvalu-compile-subn.c: Likewise.
 * cv-march-xcvalu-compile-subnr.c: Likewise.
 * cv-march-xcvalu-compile-subrn.c: Likewise.
 * cv-march-xcvalu-compile-subrnr.c: Likewise.
 * cv-march-xcvalu-compile-subun.c: Likewise.
 * cv-march-xcvalu-compile-subunr.c: Likewise.
 * cv-march-xcvalu-compile-suburn.c: Likewise.
 * cv-march-xcvalu-compile-suburnr.c: Likewise.
 * cv-march-xcvalu-fail-compile.c: Likewise.
 * cv-march-xcvalu-fail-compile-addn.c: Likewise.
 * cv-march-xcvalu-fail-compile-addurn.c: Likewise.
 * cv-march-xcvalu-fail-compile-clipu.c: Likewise.
 * cv-march-xcvalu-fail-compile-subun.c: Likewise.
 * cv-march-xcvalu-fail-compile-addrn.c: Likewise.
 * cv-march-xcvalu-fail-compile.c: Likewise.
 * cv-march-xcvalu-fail-compile-subn.c: Likewise.
 * cv-march-xcvalu-fail-compile-suburn.c: Likewise.
 * cv-march-xcvalu-fail-compile-addun.c: Likewise.
 * cv-march-xcvalu-fail-compile-clip.c: Likewise.
 * cv-march-xcvalu-fail-compile-subrn.c: Likewise.

gcc/testsuite/lib:
 * target-supports.exp: Added proc for the XCVALU extension.

Signed-off-by: Helene CHELIN <helene.chelin@embecosm.com>

	* gcc/common/config/riscv/riscv-common.cc: Removed xcv for
	  all sub-extensions.

	Updated Event Load to the builtin specification and documentation:
	https://github.com/openhwgroup/core-v-sw/blob/master/specifications/corev-builtin-spec.md#listing-of-event-load-word-builtins-xcvelw

	* gcc/config/riscv/corev.def: Updated builtin cv_elw to
	  cv_elw_elw and updated argument from void_ptr to int_ptr.
	* gcc/config/riscv/corev.md: Moved UNSPEC_CV_ELW and event load
	  machine pattern from riscv.md to core.md.
	* gcc/config/riscv/riscv-builtins.cc: Added RISCV_ATYPE_INT_PTR
	  argument for integer pointer.
	* gcc/config/riscv/riscv-ftypes.def: Added macro with return type
	  unsigned integer and argument type integer pointer.
	* gcc/config/riscv/riscv.md: Moved UNSPEC_CV_ELW and event load
	  machine pattern from riscv.md to core.md.
	* gcc/doc/extend.texi: Added CORE-V Event Load documentation.
	* gcc/testsuite/gcc.target/riscv/cv-elw-elw-compile-1.c: Updated
	  test to corresponding argument type.

The CORE-V ISA Extension Naming specification was recently updated.
One of the consequences of this is that the option previously
called 'xcorev' (but implemented as 'xcv' presently due to the
prefix change) has been removed. However, the compiler does not
presently reflect this change. This patch removes the 'xcv' march
flag option so that the compiler and the CORE-V ISA Extension Naming
specification match.

See here for CORE-V ISA Extension Naming specification:
(https://github.com/openhwgroup/core-v-sw/blob/master/specifications/corev-isa-extension-naming.md)

	* gcc/common/config/riscv/riscv-common.cc: Remove 'xcv' extension.
	* gcc/config/riscv/riscv-opts.h: Likewise.

The CORE-V ISA Extension Naming specification was recently updated.
One of the changes was to change the CORE-V Extension name prefix from 'xcorev' to 'xcv'.
gcc currently prefixes corev extensions with the old prefix 'xcorev' rather than the new prefix 'xcv'.
gcc must be updated in order to reflect this change.
This patch changes all references to 'xcorev' with 'xcv'.
This also includes references in the test suite.
It also replaces internal variables that referred to the extensions as COREV_[EXTENSION_NAME] to CV_[EXTENSION_NAME].

See here for CORE-V ISA Extension Naming specification:
(https://github.com/openhwgroup/core-v-sw/blob/master/specifications/corev-isa-extension-naming.md)

	* gcc/common/config/riscv/riscv-common.cc: Update references to corev extension prefix with cv.
	* gcc/config/riscv/corev.def: Likewise.
	* gcc/config/riscv/corev.md: Likewise.
	* gcc/config/riscv/riscv-builtins.cc: Likewise.
	* gcc/config/riscv/riscv-opts.h: Likewise.
	* gcc/config/riscv/riscv.md: Likewise.
	* gcc/config/riscv/riscv.opt: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-elw-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevbitmanip-compile-bclr.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvbitmanip-compile-bclr.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevbitmanip-compile-bclrr.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvbitmanip-compile-bclrr.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevbitmanip-compile-bitrev.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvbitmanip-compile-bitrev.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevbitmanip-compile-bset.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvbitmanip-compile-bset.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevbitmanip-compile-bsetr.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvbitmanip-compile-bsetr.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevbitmanip-compile-clb.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvbitmanip-compile-clb.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevbitmanip-compile-cnt.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvbitmanip-compile-cnt.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevbitmanip-compile-extract.c: Renamed to ...
	* ggc/testsuite/gcc.target/riscv/cv-march-xcvbitmanip-compile-extract.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevbitmanip-compile-extractr.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvbitmanip-compile-extractr.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevbitmanip-compile-extractu.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvbitmanip-compile-extractu.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevbitmanip-compile-extractur.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvbitmanip-compile-extractur.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevbitmanip-compile-ff1.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvbitmanip-compile-ff1.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevbitmanip-compile-fl1.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvbitmanip-compile-fl1.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevbitmanip-compile-insert.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvbitmanip-compile-insert.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevbitmanip-compile-insertr.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvbitmanip-compile-insertr.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevbitmanip-compile-ror.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvbitmanip-compile-ror.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevbitmanip-fail-compile-bclr.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvbitmanip-fail-compile-bclr.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevbitmanip-fail-compile-bitrev.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvbitmanip-fail-compile-bitrev.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevbitmanip-fail-compile-bset.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvbitmanip-fail-compile-bset.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevbitmanip-fail-compile-extract.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvbitmanip-fail-compile-extract.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevbitmanip-fail-compile-extractu.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvbitmanip-fail-compile-extractu.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevbitmanip-fail-compile-insert.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvbitmanip-fail-compile-insert.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-compile-mac.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-compile-mac.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-compile-machhsn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-compile-machhsn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-compile-machhsrn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-compile-machhsrn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-compile-machhun.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-compile-machhun.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-compile-machhurn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-compile-machhurn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-compile-macsn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-compile-macsn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-compile-macsrn.: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-compile-macsrn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-compile-macun.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-compile-macun.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-compile-macurn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-compile-macurn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-compile-msu.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-compile-msu.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-compile-mulhhsn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-compile-mulhhsn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-compile-mulhhsrn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-compile-mulhhsrn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-compile-mulhhun.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-compile-mulhhun.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-compile-mulhhurn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-compile-mulhhurn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-compile-mulsn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-compile-mulsn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-compile-mulsrn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-compile-mulsrn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-compile-mulun.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-compile-mulun.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-compile-mulurn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-compile-mulurn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-fail-compile-mac.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-fail-compile-mac.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-fail-compile-machhsn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-fail-compile-machhsn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-fail-compile-machhsrn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-fail-compile-machhsrn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-fail-compile-machhun.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-fail-compile-machhun.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-fail-compile-machhurn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-fail-compile-machhurn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-fail-compile-macsn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-fail-compile-macsn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-fail-compile-macsrn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-fail-compile-macsrn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-fail-compile-macun.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-fail-compile-macun.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-fail-compile-macurn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-fail-compile-macurn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-fail-compile-msu.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-fail-compile-msu.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-fail-compile-mulhhsn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-fail-compile-mulhhsn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-fail-compile-mulhhsrn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-fail-compile-mulhhsrn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-fail-compile-mulhhun.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-fail-compile-mulhhun.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-fail-compile-mulhhurn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-fail-compile-mulhhurn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-fail-compile-mulsn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-fail-compile-mulsn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-fail-compile-mulsrn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-fail-compile-mulsrn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-fail-compile-mulun.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-fail-compile-mulun.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-fail-compile-mulurn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-fail-compile-mulurn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-simd-abs-b-compile-1.c: Update references to corev extension prefix with cv.
	* gcc/testsuite/gcc.target/riscv/cv-simd-abs-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-add-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-add-div2-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-add-div4-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-add-div8-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-add-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-add-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-add-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-and-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-and-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-and-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-and-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-avg-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-avg-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-avg-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-avg-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-avgu-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-avgu-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-avgu-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-avgu-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpeq-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpeq-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpeq-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpeq-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpge-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpge-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpge-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpge-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgeu-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgeu-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgeu-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgeu-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgt-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgt-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgt-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgt-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgtu-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgtu-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgtu-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgtu-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmple-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmple-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmple-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmple-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpleu-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpleu-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpleu-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpleu-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmplt-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmplt-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmplt-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmplt-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpltu-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpltu-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpltu-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpltu-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpne-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpne-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpne-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpne-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cplxconj-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cplxmul-i-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cplxmul-i-div2-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cplxmul-i-div4-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cplxmul-i-div8-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cplxmul-r-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cplxmul-r-div2-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cplxmul-r-div4-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cplxmul-r-div8-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotsp-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotsp-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotsp-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotsp-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotup-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotup-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotup-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotup-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotusp-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotusp-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotusp-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotusp-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-extract-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-extract-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-extractu-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-extractu-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-insert-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-insert-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-max-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-max-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-max-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-max-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-maxu-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-maxu-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-maxu-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-maxu-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-min-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-min-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-min-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-min-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-minu-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-minu-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-minu-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-minu-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-or-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-or-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-or-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-or-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-pack-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-pack-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-packhi-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-packlo-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotsp-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotsp-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotsp-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotsp-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotup-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotup-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotup-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotup-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotusp-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotusp-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotusp-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotusp-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-shuffle-sci-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-shuffle2-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-shuffle2-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-shufflei0-sci-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-shufflei1-sci-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-shufflei2-sci-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-shufflei3-sci-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sll-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sll-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sll-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sll-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sra-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sra-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sra-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sra-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-srl-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-srl-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-srl-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-srl-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sub-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sub-div2-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sub-div4-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sub-div8-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sub-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sub-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sub-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-subrotmj-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-subrotmj-div2-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-subrotmj-div4-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-subrotmj-div8-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-xor-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-xor-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-xor-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-xor-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-xcorevsimd-march-compile-1.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-xcvsimd-march-compile-1.c: ... this.
	* gcc/testsuite/lib/target-supports.exp: Update references to corev extension prefix with cv.

	* gcc/config/riscv/constraints.md: Renamed `const_int2_operand`
	  to `const_int2_simd_operand`.
	* gcc/config/riscv/corev.md: Renamed `const_int2_operand`
	  to `const_int2_simd_operand`.
	* gcc/config/riscv/predicates.md: Changing layout of CORE-V
	  Predicates.
	* gcc/doc/extend.texi: Changing layout of CORE-V Built-in
	  Documentation.

	* gcc/doc/extend.texi: Documentation on 142 SIMD Built-ins
	  for 220 SIMD instructions.

	158 Compilation Tests and 1 MARCH test: cv-xcorevsimd-march-compile-1.c

	* gcc/testsuite/gcc.target/riscv/cv-simd-abs-b-compile-1.c: Created.
	* gcc/testsuite/gcc.target/riscv/cv-simd-abs-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-add-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-add-div2-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-add-div4-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-add-div8-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-add-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-add-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-add-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-and-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-and-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-and-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-and-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-avg-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-avg-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-avg-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-avg-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-avgu-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-avgu-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-avgu-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-avgu-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpeq-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpeq-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpeq-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpeq-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpge-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpge-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpge-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpge-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgeu-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgeu-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgeu-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgeu-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgt-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgt-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgt-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgt-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgtu-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgtu-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgtu-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgtu-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmple-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmple-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmple-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmple-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpleu-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpleu-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpleu-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpleu-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmplt-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmplt-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmplt-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmplt-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpltu-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpltu-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpltu-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpltu-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpne-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpne-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpne-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpne-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cplxconj-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cplxmul-i-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cplxmul-i-div2-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cplxmul-i-div4-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cplxmul-i-div8-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cplxmul-r-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cplxmul-r-div2-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cplxmul-r-div4-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cplxmul-r-div8-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotsp-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotsp-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotsp-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotsp-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotup-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotup-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotup-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotup-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotusp-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotusp-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotusp-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotusp-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-extract-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-extract-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-extractu-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-extractu-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-insert-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-insert-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-max-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-max-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-max-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-max-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-maxu-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-maxu-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-maxu-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-maxu-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-min-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-min-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-min-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-min-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-minu-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-minu-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-minu-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-minu-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-or-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-or-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-or-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-or-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-pack-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-pack-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-packhi-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-packlo-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotsp-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotsp-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotsp-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotsp-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotup-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotup-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotup-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotup-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotusp-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotusp-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotusp-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotusp-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-shuffle-sci-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-shuffle2-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-shuffle2-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-shufflei0-sci-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-shufflei1-sci-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-shufflei2-sci-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-shufflei3-sci-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sll-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sll-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sll-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sll-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sra-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sra-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sra-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sra-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-srl-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-srl-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-srl-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-srl-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sub-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sub-div2-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sub-div4-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sub-div8-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sub-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sub-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sub-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-subrotmj-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-subrotmj-div2-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-subrotmj-div4-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-subrotmj-div8-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-xor-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-xor-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-xor-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-xor-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-xcorevsimd-march-compile-1.c: Likewise.

    * gcc/config/riscv/constraints.md: Created
        * 6-bit signed immediate constraint "CV6"
        * 6-bit unsigned immediate constraint "CS6"
        * 1-bit shifting immediate constraint:
          * constant integer value "0" constraint "CF0"
          * constant integer value "1" constraint "CF1"
          * constant integer value "2" constraint "CF2"
          * constant integer value "3" constraint "CF3"

    * gcc/config/riscv/corev.def: Defined 142 SIMD builtins
      for 220 SIMD instructions with RISCV_BUILTIN.

    * gcc/config/riscv/corev.md:
      * Machine description pattern for all 142 SIMD builtins with
        UNSPEC version.
      * Included `define_c_enum "unspec"` for CORE-V specific
        unspec macros.

    * gcc/config/riscv/predicates.md: Created
        * 6-bit signed immediate predicate for constraint "CV6"
        * 6-bit unsigned immediate predicate for constraint "CS6"
        * 4-bit unsigned immediate predicate for constraint
          "CF0,CF1,CF2,CF3"

    * gcc/config/riscv/riscv-builtins.cc: Created SIMD Avaliability
      Predicate, RISCV_FTYPE_NAME2, RISCV_FTYPE_ATYPES2. Added
      corresponding argument types for builtins.

    * gcc/config/riscv/riscv-ftypes.def: Added corresponding
      DEF_RISCV_FTYPE return type and argument types for builtins.

    * gcc/common/config/riscv/riscv-common.cc: Added XCOREVSIMD
      extensions. Added riscv_xcorev_flags to SIMD extensions.
    * gcc/config/riscv/riscv-opts.h: Added corresponding MASK and
      TARGET macros for XCOREVSIMD.

Files Changed:
gcc/common/config/riscv:
 * riscv-common.cc: Added the XCOREVBITMANIP extension.

gcc/config/riscv:
 * constraints.md: Added builtins for the XCOREVBITMANIP extension.
 * corev.def: Likewise.
 * corev.md: Likewise.
 * predicates.md: Likewise.
 * riscv-builtins.cc: Likewise.
 * riscv-ftypes.def: Likewise.
 * riscv-opts.h: Likewise.
 * riscv.md: Likewise.

gcc/doc:
 * extend.texi: Added documentation for the XCOREVBITMANIP
   extension builtins.

gcc/testsuite/gcc.target/riscv:
 * cv-march-xcorevbitmanip-compile-bclr.c: Added new tests.
 * cv-march-xcorevbitmanip-compile-bclrr.c: Likewise.
 * cv-march-xcorevbitmanip-compile-bitrev.c: Likewise.
 * cv-march-xcorevbitmanip-compile-bset.c: Likewise.
 * cv-march-xcorevbitmanip-compile-bsetr.c: Likewise.
 * cv-march-xcorevbitmanip-compile-clb.c: Likewise.
 * cv-march-xcorevbitmanip-compile-cnt.c: Likewise.
 * cv-march-xcorevbitmanip-compile-extract.c: Likewise.
 * cv-march-xcorevbitmanip-compile-extractr.c: Likewise.
 * cv-march-xcorevbitmanip-compile-extractu.c: Likewise.
 * cv-march-xcorevbitmanip-compile-extractur.c: Likewise.
 * cv-march-xcorevbitmanip-compile-ff1.c: Likewise.
 * cv-march-xcorevbitmanip-compile-fl1.c: Likewise.
 * cv-march-xcorevbitmanip-compile-insert.c: Likewise.
 * cv-march-xcorevbitmanip-compile-insertr.c: Likewise.
 * cv-march-xcorevbitmanip-compile-ror.c: Likewise.
 * cv-march-xcorevbitmanip-fail-compile-bclr.c: Likewise.
 * cv-march-xcorevbitmanip-fail-compile-bitrev.c: Likewise.
 * cv-march-xcorevbitmanip-fail-compile-bset.c: Likewise.
 * cv-march-xcorevbitmanip-fail-compile-extract.c: Likewise.
 * cv-march-xcorevbitmanip-fail-compile-extractu.c: Likewise.
 * cv-march-xcorevbitmanip-fail-compile-insert.c: Likewise.

gcc/testsuite/lib:
 * target-supports.exp: Added proc for the XCOREVBITMANIP extension.

Signed-off-by: Mary Bennett <mary.bennett@embecosm.com>

gcc/common/config/riscv:
  * riscv-common.cc: Added XCOREVMAC

gcc/config/riscv:
  * corev.def: Added XCOREVMAC builtins.
  * corev.md: Likewise.
  * riscv-builtins.cc: Likewise.
  * riscv-ftypes.def: Likewise.
  * riscv-opts.h: Likewise.
  * riscv.md: Likewise.

gcc/doc:
  * extend.texi: Added XCOREVMAC builtin documentation.

gcc/testsuits/gcc.target/riscv:
  * cv-march-xcorevmac-compile-mac.c: Added compile tests for new builtins.
  * cv-march-xcorevmac-compile-machhsn.c: Likewise.
  * cv-march-xcorevmac-compile-machhsrn.c: Likewise.
  * cv-march-xcorevmac-compile-machhun.c: Likewise.
  * cv-march-xcorevmac-compile-machhurn.c: Likewise.
  * cv-march-xcorevmac-compile-macsn.c: Likewise.
  * cv-march-xcorevmac-compile-macsrn.c: Likewise.
  * cv-march-xcorevmac-compile-macun.c: Likewise.
  * cv-march-xcorevmac-compile-macurn.c: Likewise.
  * cv-march-xcorevmac-compile-msu.c: Likewise.
  * cv-march-xcorevmac-compile-mulhhsn.c: Likewise.
  * cv-march-xcorevmac-compile-mulhhsrn.c: Likewise.
  * cv-march-xcorevmac-compile-mulhhun.c: Likewise.
  * cv-march-xcorevmac-compile-mulhhurn.c: Likewise.
  * cv-march-xcorevmac-compile-mulsn.c: Likewise.
  * cv-march-xcorevmac-compile-mulsrn.c: Likewise.
  * cv-march-xcorevmac-compile-mulun.c: Likewise.
  * cv-march-xcorevmac-compile-mulurn.c: Likewise.
  * cv-march-xcorevmac-fail-compile-mac.c: Likewise.
  * cv-march-xcorevmac-fail-compile-machhsn.c: Likewise.
  * cv-march-xcorevmac-fail-compile-machhsrn.c: Likewise.
  * cv-march-xcorevmac-fail-compile-machhun.c: Likewise.
  * cv-march-xcorevmac-fail-compile-machhurn.c: Likewise.
  * cv-march-xcorevmac-fail-compile-macsn.c: Likewise.
  * cv-march-xcorevmac-fail-compile-macsrn.c: Likewise.
  * cv-march-xcorevmac-fail-compile-macun.c: Likewise.
  * cv-march-xcorevmac-fail-compile-macurn.c: Likewise.
  * cv-march-xcorevmac-fail-compile-msu.c: Likewise.
  * cv-march-xcorevmac-fail-compile-mulhhsn.c: Likewise.
  * cv-march-xcorevmac-fail-compile-mulhhsrn.c: Likewise.
  * cv-march-xcorevmac-fail-compile-mulhhun.c: Likewise.
  * cv-march-xcorevmac-fail-compile-mulhhurn.c: Likewise.
  * cv-march-xcorevmac-fail-compile-mulsn.c: Likewise.
  * cv-march-xcorevmac-fail-compile-mulsrn.c: Likewise.
  * cv-march-xcorevmac-fail-compile-mulun.c: Likewise.
  * cv-march-xcorevmac-fail-compile-mulurn.c: Likewise.

gcc/testsuite/lib:
  * target-supports.exp: Added XCOREVMAC proc.

Signed-off-by: Mary Bennett <mary.bennett@embecosm.com>

	* gcc/config/riscv/riscv.md: Changed the use of pointer (P) mode
          to single integer (SI) mode.

Signed-off-by: Nandni Jamnadas <nandni.jamnadas@embecosm.com>

	* gcc/common/config/riscv/riscv-common.cc: Added XCOREV and
	  XCOREVELW extensions. Added riscv_xcorev_flags to extensions.
	* gcc/config/riscv/corev.def: Implemented builtin prototype.
	* gcc/config/riscv/riscv-builtins.cc: Added AVAIL for XCOREVELW.
	  Declared pointer type node for builtin argument type.
	  Included "corev.def" to riscv_builtin_description
	  riscv_builtins[].
	* gcc/config/riscv/riscv-ftypes.def: Added DEF_RISCV_TYPE to
	  return an USI (unsigned integer) and take in a VOID_PTR
	  (void pointer).
	* gcc/config/riscv/riscv-opts.h: Added corresponding MASK and
	  TARGET macros for XCOREV and XCOREVELW.
	* gcc/config/riscv/riscv.md: Added machine description for cv.elw.
	* gcc/config/riscv/riscv.opt: Added Target Variable:
	  riscv_xcorev_flags.
	* gcc/testsuite/gcc.target/riscv/cv-elw-compile-1.c: Created test
	  for cv.elw builtin.

Signed-off-by: Nandni Jamnadas <nandni.jamnadas@embecosm.com>

Files changed:

	* README: Add CORE-V preamble.

Signed-off-by: Jeremy Bennett <jeremy.bennett@embecosm.com>

For the assembly/linking step of the device code, the "-save-temps" was not
passed on, such that amdgcn-amdhsa/bin/as and amdgcn-amdhsa's collect2
were invoked with '-o /tmp/cc...' and '@/tmp/cc...', respectively.
The -dump... prefix (...mkoffload.hsaco) was already properly set.

gcc/ChangeLog:

	* config/gcn/mkoffload.cc (main): Pass -save-temps on for the
	hsaco assemble/link.

get__Pragma_string() in directives.cc is responsible for lexing the parens
and the string argument from a _Pragma("...") operator. This function does
not handle the case when the closing paren is not on the same line as the
string; in that case, libcpp will by default reuse the token buffer it
previously used for the string, so that the string token returned by
get__Pragma_string() may be corrupted, as shown in the testcase. Fix using
the existing keep_tokens mechanism that temporarily disables the reuse of
token buffers.

libcpp/ChangeLog:

	PR preprocessor/67046
	* directives.cc (_cpp_do__Pragma): Increment pfile->keep_tokens to
	ensure the returned string token is valid.

gcc/testsuite/ChangeLog:

	PR preprocessor/67046
	* c-c++-common/cpp/pr67046.c: New test.

Updates cpp_wcwidth() to Unicode 15, following the procedure in
contrib/unicode/README mechanically without incident.

contrib/ChangeLog:

	* unicode/DerivedCoreProperties.txt: Update to Unicode 15.
	* unicode/DerivedNormalizationProps.txt: Likewise.
	* unicode/EastAsianWidth.txt: Likwise.
	* unicode/PropList.txt: Likewise.
	* unicode/README: Likewise.
	* unicode/UnicodeData.txt: Likewise.

libcpp/ChangeLog:

	* generated_cpp_wcwidth.h: Regenerated for Unicode 15.

On Tue, Mar 07, 2023 at 05:50:39PM +0000, Jonathan Wakely via Gcc-patches wrote:
> I guess you want to regenerate the powerpc64 ones now. The others are
> all OK for trunk.

So the following patch updates powerpc64 which has been excluded from
the last patch (the difference between the older and current patch is
-+FUNC:_ZSt15__try_use_facetINSt19__gnu_cxx11_ieee1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEEEPKT_RKSt6locale@@GLIBCXX_3.4.31
-+FUNC:_ZSt15__try_use_facetINSt19__gnu_cxx11_ieee1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEEEPKT_RKSt6locale@@GLIBCXX_3.4.31
-+FUNC:_ZSt15__try_use_facetINSt19__gnu_cxx11_ieee1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEEEPKT_RKSt6locale@@GLIBCXX_3.4.31
-+FUNC:_ZSt15__try_use_facetINSt19__gnu_cxx11_ieee1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEEEPKT_RKSt6locale@@GLIBCXX_3.4.31
++FUNC:_ZSt15__try_use_facetINSt19__gnu_cxx11_ieee1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEEEPKT_RKSt6locale@@GLIBCXX_IEEE128_3.4.31
++FUNC:_ZSt15__try_use_facetINSt19__gnu_cxx11_ieee1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEEEPKT_RKSt6locale@@GLIBCXX_IEEE128_3.4.31
++FUNC:_ZSt15__try_use_facetINSt19__gnu_cxx11_ieee1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEEEPKT_RKSt6locale@@GLIBCXX_IEEE128_3.4.31
++FUNC:_ZSt15__try_use_facetINSt19__gnu_cxx11_ieee1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEEEPKT_RKSt6locale@@GLIBCXX_IEEE128_3.4.31
which is I think exactly what we want) and also updates aarch64 for the
bfloat16_t tinfo symbols.

2023-03-13  Jakub Jelinek  <jakub@redhat.com>

	* config/abi/post/aarch64-linux-gnu/baseline_symbols.txt: Update.
	* config/abi/post/powerpc64-linux-gnu/baseline_symbols.txt: Update.

libstdc++-v3/ChangeLog:

	* doc/Makefile.am: Add comment referring to documentation.
	* doc/Makefile.in: Regenerate.

libstdc++-v3/ChangeLog:

	* doc/html/*: Regenerate.

libstdc++-v3/ChangeLog:

	* doc/xml/faq.xml: Update copyright year.

Reported by Jonny Grant.

libstdc++-v3/ChangeLog:

	* include/bits/allocator.h: Fix typo in comment.

The following addresses PR109046 by adding an optimization to forwprop
to combine a piecewise complex load to a complex load when there are
no other uses of the components.  That's something useful in general and
easier to do than avoiding the splitting in complex lowering.

The testcase exercises both the manual and the complex lowering case.

	PR tree-optimization/109046
	* tree-ssa-forwprop.cc (pass_forwprop::execute): Combine
	piecewise complex loads.

	* gcc.dg/tree-ssa/forwprop-39.c: New testcase.