sdiv exact X, (1<<ShAmt) --> ashr exact X, ShAmt (if shl is non-negative)

https://alive2.llvm.org/ce/z/kB6VF7

It would probably be better to use ValueTracking to replace this
and the existing transform above it, but the analysis does not
account for the no-wrap properly, and it's not immediately clear
to me how to fix it.

Implementing the paper
P2291R3 Add Constexpr Modifiers to Functions to_chars and from_chars for
        Integral Types in <charconv> Header

Gives issues in language versions prior to C++17. As suggested in
D131855 disable the code prior to C++17. This removes libc++'s
extension.

Reviewed By: ldionne, #libc_vendors, #libc, philnik

Differential Revision: https://reviews.llvm.org/D133216

The checker should ignore requirement expressions inside concept
definitions, because redundant expressions still make sense here

Fixes https://github.com/llvm/llvm-project/issues/54114

Reviewed By: njames93, aaron.ballman

Differential Revision: https://reviews.llvm.org/D122078

The logic added in 3771310e was placed sub-optimally. Applying the
transform in ::getConstraint meant that it would also impact conditions
that are added to the system by the signed <-> unsigned transfer logic.

This meant we failed to add some signed facts to the signed system. To
make sure we still add as many useful facts to the signed/unsigned
systems, move the logic to the point where we query the system.

Closes https://github.com/llvm/llvm-project/issues/58196.

The root cause for the problem is an oversight in
https://reviews.llvm.org/D127624, which allows the redeclarations in
partitions. However, we took a mistake there that we should only allow
it if the redeclarations in the one same module instead of return
directly if either the redeclaration lives in a partition. The original
implementation makes no sense and I believe it was an oversight.

Closes https://github.com/llvm/llvm-project/issues/58199

Previously, when we act on a import statement, we'll assume there is a
module declaration in the current TU if the command line tells us we're
compiling a module unit. This makes since on valid codes. However, for
invalid codes, it is possible. See
https://github.com/llvm/llvm-project/issues/58199 for example.

This patch removes the assertion. And the assertion is a noop and it
should be safe to remove it.

For more details, please refer to the latest ISE document: https://www.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html

Reviewed By: pengfei

Differential Revision: https://reviews.llvm.org/D135509

This patch fixes the failure of llvm/test/CodeGen/Generic/vector.ll and
CodeGen/PowerPC/2007-11-19-VectorSplitting.ll for a LoongArch native build.

Differential Revision: https://reviews.llvm.org/D134798

Differential Revision: https://reviews.llvm.org/D133968

Currently baremetal driver adds <sysroot>/include/c++/v1
for libc++ headers. However on ChromeOS, all include files
are inside <sysroot>/usr/include. So add
<sysroot>/usr/include/c++/v1 if it exists in baremetal driver.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D134478

This patch sets correct encodings for DWARF exception handling for
LoongArch.

Differential Revision: https://reviews.llvm.org/D134710

This adds:

* `m_c_GICmp`
* `m_c_GFCmp`

These work the same way as the standard matchers, but will also try to commute
the LHS and RHS of a compare to get a match.

E.g.

```
m_c_GICmp(m_Pred(...), m_GAdd(...), m_GSub(...))
```

Can match either of

```
icmp cc (add x, y), (sub a, b)
icmp swapped_cc (sub a, b), (add x, y)
```

Differential Revision: https://reviews.llvm.org/D135415

Currently memprof profile is dumped when program exits (call `FinishAndWrite()` in ~Allocator) or `__memprof_profile_dump` is manually called.
For programs that never exit (e.g. server-side application), it will be useful to dump memprof profile when specific signal is received.
This patch installs a signal handler for deadly signals(SIGSEGV, SIGBUS, SIGABRT, SIGILL, SIGTRAP, SIGFPE) like we do in other sanitizers. In the signal handler `__memprof_profile_dump` is called to dump memprof profile.

Reviewed By: tejohnson

Differential Revision: https://reviews.llvm.org/D134795

This commit adds a pattern to merge accumulator and result
`vector.transpose` ops into `vector.contract`. This kind of
pattern can be generated for NCHW convolution vectorization,
where we use transposes to convert the 1-D NCW convolution
into NWC during vectorization. Merging the transpose would
mean we can avoid materialize vector extract/insert for
transposes and it makes further vector level transformations
easier.

Reviewed By: ThomasRaoux

Differential Revision: https://reviews.llvm.org/D135496

Differential Revision: https://reviews.llvm.org/D135418

Reviewed By: rtenneti

Differential Revision: https://reviews.llvm.org/D135501

[libFuzzer] update the libFuzzer docs to reflect the current state.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D135312

Without this patch, we hit the following a lot:
"llvm.dbg.declare intrinsic requires a !dbg attachment"
"DICompileUnit not listed in llvm.dbg.cu"

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D135492

The first line got split because it was too long. Now it's fixed.

Differential Revision: https://reviews.llvm.org/D135498

There are intrinsics for most scalar instructions and almost all HVX
instructions. What's somewhat painful is that there are two intrinsics
for each HVX instruction: one for 64- and one for 128-byte mode.
Instead of checking the current codegen settings every time, this
function would simply return the right intrinsic.

The first two parameters of addcarry are commutative. We may face a situation where both variant are present in the DAG, in which case we benefit from using just one.

Depends on D57302 and D33587

Reviewed By: RKSimon, chfast

Differential Revision: https://reviews.llvm.org/D57317

Typically when you match something, you want to check the result.

Fix a couple warnings in the AMDGPUPostLegalizerCombiner which appear as a
result of this.

Differential Revision: https://reviews.llvm.org/D135491

Tests relying on this should explicitly use -passes='require<analysis>,foo'.

.bss section emitted by llvm-bolt (e.g. with instrumentation) is not a
real BSS section, i.e. it takes space in the output file. Hence the
order with respect to .data is not defined. Remove .bss from the test
and fix the buildbot failure.

Reviewed By: Amir

Differential Revision: https://reviews.llvm.org/D135475

Add `-std=c++17` to the test so that buildbot won't fail

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D135486

Differential Revision: https://reviews.llvm.org/D135230

Differential Revision: https://reviews.llvm.org/D135306

Differential Revision: https://reviews.llvm.org/D135328

This was specific to `opt` for some reason.
There's already a new pass manager pass `print<domtree>` which does the same.

Clear all dispositions if there are any dead blocks (which will get
removed later) and also clear dispositions for removed instructions.

Clearing all dispositions in case there are dead blocks happens first,
which should avoid traversing SCEV use-lists for invalidating
dispositions for individual values.

Fixes #58179.

Support constexpr version of __builtin_fmax and its variations.

Reviewed By: jcranmer-intel

Differential Revision: https://reviews.llvm.org/D134369

Apparently StackColoring depends on SlotIndexes, but not
LiveIntervals. If regalloc fast were manually requested, LiveIntervals
would be dropped before SILowerSGPRSpills but not SlotIndexes.

SILowerSGPRSpills preserved SlotIndexes, but only through
LiveIntervals. As a result, SILowerSGPRSpills was incorrectly
reporting it preserved SlotIndexes. Start updating these directly,
instead of depending on LiveIntervals also being available.

ReduceOperandsSkip had the same issue as ReduceOperands when handling
phis with repeated predecessors.

Phis have a quirk where the same predecessor block may appear multiple times
if the same block branches to it multiple ways. All the values need to match,
but this was replacing each operand independently. If an operand can be simplified,
make sure to replace every instance of the incoming block's value.

Also stop using cat

This allows more precise control over which patterns to pick to
expand arithmetic ops. Previously ceil/floor division epxansion
is only available together with various min/max op expansion.

Reviewed By: ThomasRaoux

Differential Revision: https://reviews.llvm.org/D135479