- Sep 15, 2023
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Louis Dionne authored
This idea is extracted from https://reviews.llvm.org/D112319. It makes the code easier to read but doesn't otherwise change any functionality.
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zhoujing authored
The intent is clearly to push the tail rather than current BB. Reviewed By: maksfb Differential Revision: https://reviews.llvm.org/D159289
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Aaron Ballman authored
This addresses issues found by: https://lab.llvm.org/buildbot/#/builders/115/builds/53446
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Louis Dionne authored
This removes a lot of code duplication, makes the code simpler and prepares the terrain for https://reviews.llvm.org/D101206, which will fix some UB in the node-based containers. This also allows removing the dependency of list and forward_list on unique_ptr by using __allocation_guard instead.
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Louis Dionne authored
Notice that because Holder<Incomplete> is _possible_ to complete, but _unsafe_ to complete, that means that Holder<Incomplete>* is basically not an iterator and it's not even safe to ask if input_iterator<Holder<Incomplete>*> because that _will_ necessarily complete the type. So it's totally expected that we still cannot safely ask e.g. static_assert(std::indirect_unary_predicate<bool(&)(Holder<Incomplete>&), Holder<Incomplete>*>); or even static_assert(!std::indirect_unary_predicate<int, Holder<Incomplete>*>); This was originally uploaded as https://reviews.llvm.org/D119029 and I picked it up here as part of the Github PR transition. Co-authored-by:
Arthur O'Dwyer <arthur.j.odwyer@gmail.com>
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Jakub Kuderski authored
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LLVM GN Syncbot authored
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dingfei authored
Reapply after fixing the test by enabling the `debug.ExprInspection` checker. ----- NonLoc symbolic SVal to Loc casts are not supported except for nonloc::ConcreteInt. This change simplifies the source SVals so that the more casts can go through nonloc::ConcreteInt->loc::ConcreteInt path. For example: void test_simplified_before_cast_add(long long t1) { long long t2 = t1 + 3; if (!t2) { int *p = (int *) t2; clang_analyzer_eval(p == 0); // expected-warning{{TRUE}} } } If simplified, 't2' is 0, resulting 'p' is nullptr, otherwise 'p' is unknown. Fixes #62232 -
David Green authored
With both +sve and +dotprod, and a scalable vecreduce(sext) we could attempt to access the number of elements of a scalable vector. Guard against this for now, until scalable dotprod are properly supported.
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Congcong Cai authored
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Nikita Popov authored
Reapply after fixing a clang bug this exposed in D158972 and adjusting a number of tests that failed for 32-bit targets. ----- Add a check that the DILocalVariable fragment size in dbg.declare does not exceed the size of the alloca. This would have caught the invalid debuginfo regenerated by rustc in https://github.com/llvm/llvm-project/issues/64149. Differential Revision: https://reviews.llvm.org/D158743
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Jay Foad authored
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sstwcw authored
I was in a hurry and I forgot to do it for the last commit.
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sstwcw authored
See the discussion [here](https://github.com/llvm/llvm-project/pull/66168#issuecomment-1719038797). The functionality is not mature enough.
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martinboehme authored
The test demonstrates that the `this` pointer seen in the constructor has the same value as the address of the variable the object is constructed into.
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Nikita Popov authored
This partially recovers a major compile-time regression introduced by #65326.
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Dhruv Chawla authored
There is an inefficiency in the IRSymtab Builder where it does a lookup of PreservedSymbols when calling addSymbol. This lookup is linear in time, so it tends to be quite slow. Replacing it with DenseSet gives a 0.1% speedup: https://llvm-compile-time-tracker.com/compare.php?from=02d27eac0f3f470a93635fc98ae990bf2a9809ed&to=62b09786fff4d53aa0c75b64aea48de241e4a856&stat=instructions:u This change is quite similar to https://reviews.llvm.org/D157951.
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Jay Foad authored
When (post-SSA) MIR has multiple defs of the same vreg, update_mir_test_checks would use different variable names for each def like this, where DEF and DEF1 both refer to %0: ``` %0:gr32 = IMPLICIT_DEF %0:gr32 = IMPLICIT_DEF --> ; CHECK: [[DEF:%[0-9]+]]:gr32 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF1:%[0-9]+]]:gr32 = IMPLICIT_DEF ``` This should be harmless, but it messed up the way that mangle_vreg counts the number of names in vreg_map to come up with a new numeric suffix, such that you could get the same variable name for different vregs, like this, where DEF2 refers to both %0 and %2: ``` %0:gr32 = IMPLICIT_DEF %1:gr32 = IMPLICIT_DEF %0:gr32 = IMPLICIT_DEF %2:gr32 = IMPLICIT_DEF --> ; CHECK: [[DEF:%[0-9]+]]:gr32 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF1:%[0-9]+]]:gr32 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF2:%[0-9]+]]:gr32 = IMPLICIT_DEF ; CHECK-NEXT: [[DEF2:%[0-9]+]]:gr32 = IMPLICIT_DEF ``` Fix this by always using the same variable name for the same vreg. -
Jay Foad authored
XFAIL it until it is fixed by an upcoming commit.
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Vladislav Dzhidzhoev authored
Similar to llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp.
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Nikita Popov authored
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Nikita Popov authored
Don't call makeExactMulNSWRegion() twice with the same value.
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Timm Bäder authored
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Benjamin Kramer authored
This reverts commit 5ec9699c. It accesses MI after it has been hoisted.
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Benjamin Kramer authored
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Balazs Benics authored
This reverts commit 3ebf3dd3. I thought "Mergeing" will wait and confirm if the checks pass, and only merge it if they succeed. Apparently, it's not the case here xD The test is just broken in x86. See: https://lab.llvm.org/buildbot/#/builders/109/builds/73686
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Nathan Gauër authored
This PR adds the paths the SPIR-V backend folks maintains. (Another distince SPIR-V team exists, but only for the MLIR part (mlir-spirv). --------- Signed-off-by:Nathan Gauër <brioche@google.com>
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Timm Bäder authored
Differential Revision: https://reviews.llvm.org/D156509
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Timm Bäder authored
Differential Revision: https://reviews.llvm.org/D158702
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Ding Fei authored
NonLoc symbolic SVal to Loc casts are not supported except for nonloc::ConcreteInt. This change simplifies the source SVals so that the more casts can go through nonloc::ConcreteInt->loc::ConcreteInt path. For example: ```c void test_simplified_before_cast_add(long long t1) { long long t2 = t1 + 3; if (!t2) { int *p = (int *) t2; clang_analyzer_eval(p == 0); // expected-warning{{TRUE}} } } ``` If simplified, `t2` is 0, resulting `p` is nullptr, otherwise `p` is unknown. Fixes #62232 -
Alexey Bataev authored
On the very first iteration for the reductions, when trying to build reduction for boolean logic operations, no need to compare LHS/RHS with the Reduction(VectorizedTree), need to compare with actual parameters of the reduction operations.
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Zhang authored
Otherwise CMake might throw and error: CMake Error: try_run() invoked in cross-compiling mode, please set the following cache variables appropriately: Z3_RETURNCODE (advanced) Z3_RETURNCODE__TRYRUN_OUTPUT (advanced)
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Matthew Devereau authored
[The ACLE](https://github.com/ARM-software/acle/pull/268) Demands that functions with the aarch64_pstate_za_new attribute set all bits of the ZA register to zero upon entry.
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Jay Foad authored
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Job Noorman authored
Calls on RISC-V are typically compiled to `auipc`/`jalr` pairs to allow a maximum target range (32-bit pc-relative). In order to optimize calls to near targets, linker relaxation may replace those pairs with, for example, single `jal` instructions. To allow BOLT to freely reassign function addresses in relaxed binaries, this patch proposes the following approach: - Expand all relaxed calls back to `auipc`/`jalr`; - Rely on JITLink to relax those back to shorter forms where possible. This is implemented by detecting all possible call instructions and replacing them with `PseudoCALL` (or `PseudoTAIL`) instructions. The RISC-V backend then expands those and adds the necessary relocations for relaxation. Since BOLT generally ignores pseudo instruction, this patch makes `MCPlusBuilder::isPseudo` virtual so that `RISCVMCPlusBuilder` can override it to exclude `PseudoCALL` and `PseudoTAIL`. To ensure JITLink knows about the correct section addresses while relax...
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Nikita Popov authored
Followup to D158849: We also need to remove the phi node from the VN table, which is not handled by removeInstruction(). Fixes https://github.com/llvm/llvm-project/issues/65447.
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Benjamin Maxwell authored
This allows lowering vector types like: vector<3x[4]> or vector<3x2x[4]> to LLVM IR, i.e. vectors where the trailing dim is scalable. This is contingent on: https://discourse.llvm.org/t/rfc-enable-arrays-of-scalable-vector-types/72935 More tests will be added in later patches, however, some MLIR fixes are needed first. Depends on: D158517 Reviewed By: awarzynski Differential Revision: https://reviews.llvm.org/D158752
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Yusuke MINATO authored
Adds a new HLFIR operation for the MINVAL intrinsic according to the design set out in flang/docs/HighLevelFIR.md.
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Martin Erhart authored
This reverts commit ea42b49f. Some GPU integration tests are failing that I didn't observe locally. Reverting until I have a fix.
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Guillaume Chatelet authored
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