[update_mir_test_checks] Handle multiple defs of vreg (#66483)
When (post-SSA) MIR has multiple defs of the same vreg,
update_mir_test_checks would use different variable names for each def
like this, where DEF and DEF1 both refer to %0:
```
%0:gr32 = IMPLICIT_DEF
%0:gr32 = IMPLICIT_DEF
-->
; CHECK: [[DEF:%[0-9]+]]:gr32 = IMPLICIT_DEF
; CHECK-NEXT: [[DEF1:%[0-9]+]]:gr32 = IMPLICIT_DEF
```
This should be harmless, but it messed up the way that mangle_vreg
counts the number of names in vreg_map to come up with a new numeric
suffix, such that you could get the same variable name for different
vregs, like this, where DEF2 refers to both %0 and %2:
```
%0:gr32 = IMPLICIT_DEF
%1:gr32 = IMPLICIT_DEF
%0:gr32 = IMPLICIT_DEF
%2:gr32 = IMPLICIT_DEF
-->
; CHECK: [[DEF:%[0-9]+]]:gr32 = IMPLICIT_DEF
; CHECK-NEXT: [[DEF1:%[0-9]+]]:gr32 = IMPLICIT_DEF
; CHECK-NEXT: [[DEF2:%[0-9]+]]:gr32 = IMPLICIT_DEF
; CHECK-NEXT: [[DEF2:%[0-9]+]]:gr32 = IMPLICIT_DEF
```
Fix this by always using the same variable name for the same vreg.
parent
e4eb2043
Please register or sign in to comment