- Nov 30, 2023
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Jon Roelofs authored
Created using spr 1.3.4 [skip ci]
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Jon Roelofs authored
Created using spr 1.3.4 [skip ci]
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Jon Roelofs authored
Created using spr 1.3.4 [skip ci]
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- Nov 29, 2023
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Jon Roelofs authored
Created using spr 1.3.4 [skip ci]
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Jon Roelofs authored
Created using spr 1.3.4 [skip ci]
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Jon Roelofs authored
Created using spr 1.3.4 [skip ci]
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Farzon Lotfi authored
This change makes x64 enablement case explicit and adds an else case for 32bit which fixes a regression on Windows i386 asan builds introduced by https://github.com/llvm/llvm-project/pull/66973.
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Johannes Doerfert authored
The overhead of a library and 4 files seems high without benefit. This simply tries to consolidate our structure.
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Juergen Ributzka authored
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Alexey Bataev authored
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Stanislav Mekhanoshin authored
We can use inline constants with packed 16-bit operands, but these should use op_sel. Currently splat of inlinable constants is considered legal, which is not really true if we fail to fold it with op_sel and drop the high half. It may be legal as a literal but not as inline constant, but then usual literal checks must be performed. This patch makes these splat literals illegal but adds additional logic to the operand folding to keep current folds. This logic is somewhat heavy though. This has fixed constant bus violation in the fdot2 test.
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Jay Foad authored
Clarify how the addend is used in _HI relocation types like R_AMDGPU_ABS32_HI based on the current behaviour of the Mesa and AMDPAL ELF loaders. This affects Mesa and AMDPAL because they use REL relocation records, so the addend for these types is the 32-bit literal value from the instruction being relocated. AMDHSA is not affected because it uses RELA relocation records which have a 64-bit addend.
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Amir Ayupov authored
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Valentin Clement (バレンタイン クレメン) authored
`A program may not branch into or out of a compute construct.` This restriction is also true for combined constructs. This patch enforce this rule.
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Philip Reames authored
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Lucas Duarte Prates authored
This implements assembly support for the Debug/PMU extensions introduced as part of the Armv9.5-A architecture version. The changes include: * New ID_AA64DFR2_EL1 ID system register * New MDSTEPOP_EL1 and SPMZR_EL0 system registers Mode details about these extensions can be found at: * https://community.arm.com/arm-community-blogs/b/architectures-and-processors-blog/posts/arm-a-profile-architecture-developments-2023 * https://developer.arm.com/documentation/ddi0602/2023-09/ Co-authored-by:
Oliver Stannard <oliver.stannard@arm.com>
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Stefan Gränitz authored
Also rename the fixture class since these tests are not ELF-specific.
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- Nov 28, 2023
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Michael Buch authored
In https://github.com/llvm/llvm-project/pull/71780 we started emitting definitions for all static data-members with constant initialisers, even if they were constants (i.e., didn't have a location). We also dropped the DW_AT_const_value from the declaration to [help resolve inconsistencies during type merging in the DWARFParallelLinker](https://github.com/llvm/llvm-project/pull/68721). However, for static data members that do have locations, we wouldn't emit a DW_AT_const_value on it, assuming that the consumer knows how to read the value using the location. This broke some consumers that really wanted to find a DW_AT_const_value. Ultimately we want to attach a DW_AT_const_value to definitions that have a location too. But to fix consumers broken by said change, this patch adds the constant back onto the declaration. This is what we used to do prior to https://github.com/llvm/llvm-project/pull/71780
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Philip Reames authored
If we have a high LMUL build_vector and a known exact VLEN, we can decompose the build_vector into one build_vector per register in the register group. Doing so requires exact knowledge of which elements correspond to each register in the register group, and thus an exact VLEN must be known. Since we no longer have operations which are linear (or worse) in LMUL, this also allows us to lower all build_vectors without resorting to going through the stack.
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Alexey Bataev authored
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DonatNagyE authored
...to model the results of alloca() and _alloca() calls. Previously it acted as if these functions were returning memory from the heap, which led to alpha.security.ArrayBoundV2 producing incorrect messages.
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Philip Reames authored
This was suggested in another related review, so backporting it to the existing code as well.
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Alexey Bataev authored
No need to store optional boolean in the map, enough to store boolean directly. Also, we can do preliminary check for instruction and if they are not simple, mark as aliased without storing this result in the map.
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Cyndy Ishida authored
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Andrzej Warzyński authored
This is a direct follow-up of #73348. The matvec trait that's used for `@matvec_m_mk_k` was incorrectly updated from: ``` #redpar_vecmattrans_accesses = [ affine_map<(m, k) -> (m)>, affine_map<(m, k) -> (m, k)>, affine_map<(m, k) -> (k)> ] indexing_maps = #redpar_vecmattrans_accesses, iterator_types = ["reduction", "parallel"] } ``` to: ``` #matvec_accesses_4 = [ affine_map<(m, k) -> (k)>, affine_map<(m, k) -> (k, m)>, affine_map<(m, k) -> (m)> ] indexing_maps = #matvec_accesses_4, iterator_types = ["parallel", "reduction"] } ``` Note that these traits describe identical matvec operation, hence the `CHECK` lines are identical for both. Also, `#redpar_vecmattrans_trait` is identical to `#matvec_trait_8` that's already present in: * "vector-contract-to-outerproduct-matvec-transforms.mlir" For this reason: * `@matvec_m_mk_k` is moved near other tests that already use `...
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Graham Hunter authored
Parameters marked as uniform take a scalar value, assuming the value is invariant in the scalar loop.
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Amir Ayupov authored
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Nikita Popov authored
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Nikita Popov authored
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Nikita Popov authored
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Nikita Popov authored
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Matt Arsenault authored
Just follow along with the reassociate pragma. This allows locally setting the arcp fast math flag. Previously you could only access this through the global -freciprocal-math. Fixes #64798
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Matt Arsenault authored
This was overriding the Predicate list computed by PredicateControl. There are other places that seem to also be setting confusing overrides of computed predicate lists.
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Jay Foad authored
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Jay Foad authored
Allow foldImmediate to create instructions like: v_fmaak_f32 v0, s0, v0, 0x42000000 This instruction has two "scalar values": s0 and 0x42000000. On GFX10+ this is allowed. This fold was originally implemented before the compiler supported GFX10, when all ASICs were limited to one scalar value.
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Zhikai Zeng authored
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Uday Bondhugula authored
While 0b80288e allowed more efficient lowering for 16xi8 loads, its test case was closer to an "integration" one. Add a much simpler unit test case that exercises it.
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Nikita Popov authored
In preparation for handling non-assume context-sensitive facts.
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Shengchen Kan authored
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serge-sans-paille authored
It is quite common to symlink clang-format-diff.py to clang-format-diff, and in that case the help output still refers to the .py version. Compute it instead to work in both setup.
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