Currently tryToGatherExtractElements function analyzes the whole vector,
regrdless number of actual registers, used in this vector. It may
prevent some optimizations, because per-register analysis may allow to
simplify the final code by reusing more already emitted vectors and
better shuffles.

Differential Revision: https://reviews.llvm.org/D148855

This patch prevents us from calling the projection more than 3 times in
std::clamp, as required by the Standard.

Fixes #64717

LLVM::CallIntrinsicOp was previously overlooked from the
isLegalToInline.

Opaque pointer cleanup effort.

This fixes bot failure https://lab.llvm.org/buildbot/#/builders/139/builds/52622 introduced by 65761200

The m_ZExtOrSExt / m_Trunc in the following code can match constant
expressions, which we don't want here. Make sure we bail out early
for non-immediate constants.

Modifications:

- Skip the instantiation of the explicit-specifier during Decl
substitution if we are deducing template arguments and the
explicit-specifier is value dependent.

- Instantiate the explicit-specifier after the constraint checking
completes.

- Make `instantiateExplicitSpecifier` a member function in order to
instantiate the explicit-specifier in different stages.


This PR doesn’t defer the instantiation of the explicit specifier for
deduction guides, because I’m not familiar with deduction guides yet.
I’ll dig into it after this PR.

According to my local test, GCC 13 tuple works with this PR.

Fixes #59827.

---------

Co-authored-by: Erich Keane <ekeane@nvidia.com>

This patch converts `LinkageSpecDecl::LanguageIDs` into scoped enum, and moves it to namespace scope, so that it can be forward-declared where required.

A time trace scope variable of `ParseDeclarationOrFunctionDefinition`
with the function's source location is added to record the time spent
parsing the function's declaration or definition. Another time trace
scope variable of `ParseFunctionDefinition` is also added to record the
name of the defined function. A release note is added as well.

Reviewed by: Aaron Ballman
Pull request: #65268

This patch adds the feature flag FP8FMA and the assembly/disassembly
for the following instructions of NEON and SVE2:
  * NEON: 
    - FMLALBlane
    - FMLALTlane
    - FMLALLBBlane
    - FMLALLBTlane
    - FMLALLTBlane
    - FMLALLTTlane
    - FMLALB
    - FMLALT
    - FMLALLB
    - FMLALLBT
    - FMLALLTB
    - FMLALLTT
  * SVE2:
    - FMLALB_ZZZI
    - FMLALT_ZZZI
    - FMLALB_ZZZ 
    - FMLALT_ZZZ 
    - FMLALLBB_ZZZI 
    - FMLALLBT_ZZZI 
    - FMLALLTB_ZZZI 
    - FMLALLTT_ZZZI 
    - FMLALLBB_ZZZ 
    - FMLALLBT_ZZZ 
    - FMLALLTB_ZZZ 
    - FMLALLTT_ZZZ

That is according to this documentation:
https://developer.arm.com/documentation/ddi0602/2023-09

Summary:
These GPU images are expected to be freestanding, so we should disable
emission of builtins for whatever target we are offloading to.

This will be useful for ARM64EC, but it also fixes MinGW export handling
when synthetic function symbols are exported.

Require that constants are ImmConstant for this transform, as we
may otherwise generate constant expressions, which are not
necessarily free.

…to also take into account the op itself

We are working on a ConstantInt here, so folding will always
succeed. This just avoids use of the ConstantExpr API.

This transform only deals in truncations, so use
ConstantExpr::getTrunc() instead of ConstantExpr::getIntegerCast()
to clarify what operation is being performed here.

Sync the implementation with the original AsmPrinter code.

Make the code structure more similar to how the original code
in AsmPrinter looks nowadays: On error, break from the switch
and fall through to general error handling code, which will try
to ConstantFold and otherwise report an error. Ensures we always
go through the constant folding path and avoids duplicating the
error printing.

Zcmp codegen is implemented (see RISCVMoveMerger and
RISCVPushPopOptimizer), while Zicbop instructions are selected for
llvm.prefetch instrinsics. So I believe it's correct to mark both as
"Supported" and this is just an oversight.

We are working on ConstantInt here, so folding will always succeed.
This just avoids use of the ConstantExpr API.

All `llvm::Error`s must be checked/consumed before destruction. Previously,
the errors in this patch were only consumed when logging was enabled.
Using `LLDB_LOG_ERROR` instead of `LLDB_LOG` fixes that, because it
calls `llvm::consumeError()` explicitly when logging is disabled.

In the cases where this used to create a sext/zext constant
expression we should later error for that expression anyway, so
this should be NFC.

We're working on a ConstantInt here, so folding cannot fail. Only
avoid the API use.

We made the assumption that the registers were always physical
registers, which doesn't have to be true.

We're working on a ConstantInt here, so constant folding will
always succeed. Just avoid using the ConstantExpr API.

Replaces the old idiom (of swapping the container to shrink it) with the
newer STL alternative.

Similar transition in LLDB was done in: https://reviews.llvm.org/D47492

Looks like there's code out there that, instead of using
'__attribute__((constructor(x)))' to add constructor functions, they
just declare a global function pointer and use
'__attribute__((section('.ctors')))' instead.

Problem is, with memtag-globals, we pad the global function pointer to
be 16 bytes large. This of course means we have an 8-byte real function
pointer, then 8 bytes of zero padding, and this trips up the loader when
it processes this section.

Fixes #69939

Use IRBuilder or ConstantFolding instead.

SME2 is documented as part of the main SME supplement:
https://developer.arm.com/documentation/ddi0616/latest/

The one change for debug is this new ZT0 register. This register
contains data to be used with new table lookup instructions.
It's size is always 512 bits (not scalable) and can be
interpreted in many different ways depending on the instructions
that use it. 

The kernel has implemented this as a new register set containing
this single register. It always returns register data (with no header,
unlike ZA which does have a header).

https://docs.kernel.org/arch/arm64/sme.html

ZT0 is only active when ZA is active (when SVCR.ZA is 1). In the 
inactive state the kernel returns 0s for its contents. Therefore
lldb doesn't need to create 0s like it does for ZA. 

However, we will skip restoring the value of ZT0 if we know that
ZA is inactive. As writing to an inactive ZT0 sets SVCR.ZA to 1,
which is not desireable as it would activat...

This patch moves `ObjCMethodDecl::ImplementationControl` to a DeclBase.h so that it's complete at the point where corresponsing bit-field is declared. This patch also converts it to a scoped enum `clang::ObjCImplementationControl`.

truncateVectorWithPACK handling of sub-128-bit result types was improved some time ago, so remove the old 64-bit limit

Fixes #68466

[clang][ASTImporter] Fix crash when template class static member imported to other translation unit. (#68774)

Fixes: #68769

Co-authored-by: miaozhiyuan <miaozhiyuan@feysh.com>

Use ConstantFoldIntegerCast() instead, to remove the reliance on
constant expressions.

This always works on a constant integer or integer splat, so the
constant fold here should always succeed.

This is intended as the replacement for ConstantExpr::getIntegerCast(),
which does not require availability of the corresponding constant
expressions. It just forwards to ConstantFoldCastOperand with the
correct opcode.

Adds additional test coverage for Issue #68466

Progressive support of fastmath flag in the conversion of log type ops.

See more detail
https://discourse.llvm.org/t/rfc-fastmath-flags-support-in-complex-dialect/71981