Reviewed By: ymandel

Differential Revision: https://reviews.llvm.org/D127008

There was an issue with encoding wide (>64 bit) instructions on
BigEndian hosts, which is fixed in D127195. Therefore reland this.

gfx11 adds the ability to use dpp modifiers on vop3 instructions.
This patch adds machine code layer support for that. The MCCodeEmitter
is changed to use APInt instead of uint64_t to support these wider
instructions.

Patch 16/N for upstreaming of AMDGPU gfx11 architecture

Differential Revision: https://reviews.llvm.org/D126483

There are 3 places where we were using WASM_SEC_TAG as the "last" known
section type, which requires updating (or leaves a bug) when a new known
section type is added. Instead add a "last type" to the enum for this
purpose.

Differential Revision: https://reviews.llvm.org/D127164

This patch moves the aarch64 fixup logic from the MachO/arm64 backend to
aarch64.h header so that it can be re-used in the ELF/aarch64 backend. This
significantly expands relocation support in the ELF/aarch64 backend.

Reviewed By: lhames, sgraenitz

Differential Revision: https://reviews.llvm.org/D126286

[ValueTracking] Add support to deduce a PHI node being a power of 2 if each incoming value is a power of 2.

Reviewed By: davidxl

Differential Revision: https://reviews.llvm.org/D124889

This has been superseded by the llvm/Support/VCSRevision.h header. So
far as I can tell, nothing in the CMake build sets LLVM_VERSION_INFO. It
was always undefined, and the ifdefs using it were dead. However, CMake
is very flexible, so it's possible that I missed some ways to set this
variable. One could, for example, probably pass -DLLVM_VERSION_INFO=x on
the command line and get that through to configure_file, or set the
variable in an obscure way (`set(${proj}_VERSION_INFO "x")`). I'm
reasonably confident that isn't happening, but I'd like a second
opinion.

Update the Bazel and gn builds accordingly.

Differential Revision: https://reviews.llvm.org/D126977

This doesn't need to be configurable. It was hardcoded to void in all
LLVM build systems.

Originally broken by me in D122608, this is a regression where we
attempt to replace an extern-C thing with 'itself'.  The problem is that
we end up deleting it, causing the value to fail when it gets put into
llvm.used.

The test being change appears to have been intended to exercise PointerUnion, but what it actually did was cast<> a double to a double*.  This only worked because cast<> was missing the required assertion.  Adding the assertion reveals a template error where isa<const double*>(double) fails to compile.

Directly using StringLiteral::getString for wide string is not
currently supported; therefore in ASTDiff, getStmtValue will fail when
asserting that the StringLiteral has a width of 1. This patch also
covers cases for UTF16 and UTF32 encoding, along with corresponding
test cases.

Fixes https://github.com/llvm/llvm-project/issues/55771.

Reviewed By: johannes

Differential Revision: https://reviews.llvm.org/D126651

For instructions wider than 64 bits the InstBits table is initialized in
64-bit chunks from APInt::getRawData, but it was being read with
LoadIntFromMemory which is byte-based.

Fix this by reading the table with the APInt constructor that takes an
ArrayRef to the raw data instead.

This is currently NFC for in-tree targets but fixes AMDGPU failures on
big-endian hosts that were caused by D126483 until it was reverted.

Differential Revision: https://reviews.llvm.org/D127195

isDef32 would attempt to make a guess at which SelectionDag nodes were
32bit sources, and use the nature of 32bit AArch64 instructions
implicitly zeroing the upper register half to not emit zext that were
expected to already be zero. This was a bit fragile though, needing to
guess at the correct opcodes that do not become 32bit defs later in
ISel.

This patch removed isDef32, relying on the AArch64MIPeephole optimizer
to remove redundant SUBREG_TO_REG nodes. A part of
SelectArithExtendedRegister was left with the same logic as a heuristic
to prevent some regressions from it picking less optimal sequences.
The AArch64MIPeepholeOpt pass also needs to be taught that a COPY from a
FPR will become a FMOVSWr, which it lowers immediately to make sure that
remains true through register allocation.

Fixes #55833

Differential Revision: https://reviews.llvm.org/D127154

A crash was seen in CastValueChecker due to a null pointer dereference.

The fix uses QualType::getAsString to avoid the null dereference
when a CXXRecordDecl cannot be obtained. A small reproducer is added,
and cast value notes LITs are updated for the new debug messages.

Reviewed By: steakhal

Differential Revision: https://reviews.llvm.org/D127105

If we don't demand high bits (zeros) and it is valid to pre-shift a constant:
(C2 << X) >> C1 --> (C2 >> C1) << X

https://alive2.llvm.org/ce/z/P3dWDW

There are a variety of related patterns, but I haven't found a single solution
that gets all of the motivating examples - so pulling this piece out of
D126617 along with more tests.

We should also handle the case where we shift-right followed by shift-left,
but I'll make that a follow-on patch assuming this one is ok. It seems likely
that we would want to add this to the SDAG version of the code too to keep it
on par with IR.

Differential Revision: https://reviews.llvm.org/D127122

D127122

This patch fixes a bug in PresburgeRelation::subtract that made it process the
inequality at index 0, multiple times. This was caused by allocating memory
instead of reserving memory in llvm::SmallVector.

Reviewed By: arjunp

Differential Revision: https://reviews.llvm.org/D127228

After D126425 was submitted, hans@ observed that MSVC's ml.exe doesn't
care about the file's extension at all. Now, we check if the file exists
to determine whether an input filename is a valid assembly file.

To keep things consistent with clang-cl and lld-link, llvm-ml will treat
everything that's not a flag as a filename.

Reviewed By: hans

Differential Revision: https://reviews.llvm.org/D126931

After moving the std::to_chars base 10 implementation from the dylib to
the header the integral overloads of std::to_chars are available on all
platforms.

Remove the _LIBCPP_AVAILABILITY_TO_CHARS availability macro and update
the tests.

Depends on D125704

Reviewed By: ldionne, #libc

Differential Revision: https://reviews.llvm.org/D125745

Once extended with a case which requires duplication, will serve as test for crash being fixed in D127131.

- Updates the image to use Ubuntu Jammy.
- Installs GCC-12 as preparation to migrate to that GCC version.

Reviewed By: ldionne, #libc, jloser

Differential Revision: https://reviews.llvm.org/D126666

This was noticed in the review of D125704. In that commit only the new
table has been adapted. This adapts the existing tables.

Note since libc++'s charconv is backported to C++11 it's not possible to
use inline constexpr variables. The were introduced in C++17.

Reviewed By: #libc, ldionne

Differential Revision: https://reviews.llvm.org/D126887

Just a few spelling mistakes and missing newlines

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D127162

parseBlock may decide to leave it unchanged. Found by msan.

When we build the libomptarget device runtime library targeting bitcode,
we need special care to make sure that certain functions are not
optimized out. This is because we manually internalize and optimize
these definitions, ignoring their standard linkage semantics. When we
build with the static library, we can maintain these semantics and we do
not need these to be kept-alive. Furthermore, if they are kept-alive it
prevents them from being removed during LTO. This prevents us from
completely internalizing `IsSPMDMode` and removing several other
functions. This patch removes these for the static library target by
using a macro definition to enable them.

Reviewed By: JonChesterfield

Differential Revision: https://reviews.llvm.org/D126701

[DAG] combineShuffleOfSplatVal - fold shuffle(splat,undef) -> splat, iff the splat contains no UNDEF elements

As noticed on D127115 - we were missing this fold, instead just having the shuffle(shuffle(x,undef,splatmask),undef) fold. We should be able to merge these into one using SelectionDAG::isSplatValue, but we'll need to match the shuffle's undef handling first.

This also exposed an issue in SelectionDAG::isSplatValue which was incorrectly propagating the undef mask across a bitcast (it was trying to just bail with a APInt::isSubsetOf if it found any undefs but that was actually the wrong way around so didn't fire for partial undef cases).

This patch remove XFAIL decorator from tests which as passing on AArch64
Windows. This is tested on surface pro x using tot llvm and clang 14.0.3
as compiler with visual studio 2019 x86_arm64 environment.

This patch adds a minor fix in lldbtest.py TestBase.generateSource
function. Generated Python source with directory paths was not being
escaped properly. This fix makes sure we treat dir path as raw string.

If we look through a truncate in matchLinearIVUser, it's possible
we find a sext/zext instruction that didn't come from widening.
This will fail the MatchedItCount->getType() == InnerInductionPHI->getType()
assertion.

Fix this by checking that we did not look through a truncate already.

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D127149

Spotted while reading through the code.

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D127146

i64 indices aren't supported on Zve32*. Scalarize gathers to prevent
generating illegal instructions.

Since InstCombine will aggressively canonicalize GEP indices to
pointer size, we're pretty much always going to have an i64 index.

Trying to predict when SelectionDAG will find a smaller index from
the TTI hook used by the ScalarizeMaskedMemIntrinPass seems fragile.
To optimize this we probably need an IR pass to rewrite it earlier.

Test RUN lines have also been added to make sure the strided load/store
optimization still works.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D127179

nodes, NFC.

This patch corrects some diagnostics for the SVE sizeless vector
operators, including correctly diagnosing when the vectors are
different sizes.

Differential Revision: https://reviews.llvm.org/D126377

Found by msan

Ideally reductions would never produce invalid IR, and we shouldn't
regress on cases that already avoid doing so.

The intention is that these should never have undef operands. It turns
out the restriction the verifier enforces is too lax. The verifier
enforces that registers without a register class cannot be undef, but
it's valid to use a register with a register class and type. The
verifier needs to change to be based on the opcode.

Try to delete implicit uses, and add undef flags to explicit ones.

Differential Revision: https://reviews.llvm.org/D127117

MIR support is totally unusable for AMDGPU without this, since the set
of reserved registers is set from fields here.

Add a clone method to MachineFunctionInfo. This is a subtle variant of
the copy constructor that is required if there are any MIR constructs
that use pointers. Specifically, at minimum fields that reference
MachineBasicBlocks or the MachineFunction need to be adjusted to the
values in the new function.