Test cases in D157680 should be target specific, but miss some limit, add them back to make buildbot pass.

Reviewed By: skan, Hahnfeld

Differential Revision: https://reviews.llvm.org/D158252

Gather instructions could lead to security issues, details please refer to https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/technical-documentation/gather-data-sampling.html.
This supported options -mno-gather and -mno-scatter, which could avoid generating gather/scatter instructions in backend except using intrinsics or inline asms.

Reviewed By: pengfei

Differential Revision: https://reviews.llvm.org/D157680

Before, we allowed the condition to be simplified to a simple constant
only, otherwise we assumed all successors are live. Now we allow
multiple constants, and mark the default successor as dead accordingly.

Post review feedback on D157364. Don't section the __std_clang_module header by macro, put the headers in alphabetical order and repeat the macro guards. Restore header_information.header_restrictions.

Reviewed By: ldionne, #libc

Differential Revision: https://reviews.llvm.org/D158133

[RISCV] Make the order of tests in riscv-target-features.c eqaul to the extensions listed in the table in RISCVISAInfo.cpp. NFC.

1. Let the order of tests equal to listed in the extension table in RISCVISAInfo.cpp.
2. Separate non-experimental and experimental extensions.
3. Add missing tests for RV32.
4. Add missing tests for some extension.
5. Let line break style be the same.

Fixes https://github.com/clangd/clangd/issues/1568

Differential Revision: https://reviews.llvm.org/D147905

[clang] Support function pointer types with attributes when extracting parameter names for signature help

Fixes https://github.com/clangd/clangd/issues/1729

Differential Revision: https://reviews.llvm.org/D157952

Differential Revision: https://reviews.llvm.org/D158067

As the test case demonstrates, it is possible for a block to be identified as a
join point while not being the header of a reducible cycle. To address this,
when searching for the outermost cycle made divergent by branch outside it, we
first check for an irreducible outermost cycle before checking if the parent is
reducible.

Reviewed By: sameerds

Differential Revision: https://reviews.llvm.org/D158014

This makes "lo" refer to the least significant bits and "hi" refer
to the most significant bits.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D158228

This modifies the G_UADDE legalizaton to a version that looks shorter
on Mips and RISC-V when feeding the equivalent IR to SelectionDAG.
This also removes the boolean select from G_USUBE.

Comments taken from LegalizeDAG and tweaked.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D158232

For callee saved/restored operations, they mostly use the
following inst patterns,
sw rs2, offset(x2)
sd rs2, offset(x2)
fsw rs2, offset(x2)
fsd rs2, offset(x2)

lw rd, offset(x2)
ld rd, offset(x2)
flw rd, offset(x2)
fld rd, offset(x2)
and offset decides whether the instructions can be compressed.
now offset 2032 will be set by default if stacksize is bigger
than 2^12-1 to save and restore callee saved register, so it
will prevent all the callee saved/restored stack insts be
compressed.
Allocating proper offset for stack insts is useful to make
them be compressed.

Reviewed By: craig.topper, wangpc

Differential Revision: https://reviews.llvm.org/D157373

Scalar move and splat instruction are only demand the SEW is greater than
its own needs, but floating point vector with SEW=64 is not alwaws valid even
SEW=64 is valid, because we have a special configuration: zve64f.

So we need to check floating point vector instruction with SEW=64 is
valid when compute demand of floating point scalar move and splat
instruction.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D158086

I copied this over incorrectly from my android tree. So fix the typo.

Reviewed By: Chia-hungDuan

Differential Revision: https://reviews.llvm.org/D158240

We know that __kmpc_alloc_shared is by construction matched with a
unique __kmpc_free_shared. Making the compiler aware of these facts
helps to avoid mallocs/allocas.

Fixes: https://github.com/llvm/llvm-project/issues/64551

Test case for demonstrate invalid vsetvli insertion case

Differential Revision: https://reviews.llvm.org/D158087

Clang does not create a wrapper function for SPMD kernels. If it does
not, we still want to collect the parallel region, even if we have no
use for it right now.

Fixes: https://github.com/llvm/llvm-project/issues/64421

On Android, if PAGE_SIZE is defined, use that as the hard-coded value.
Otherwise, fallback to using getting the page size.

Reviewed By: Chia-hungDuan

Differential Revision: https://reviews.llvm.org/D158123

qHostInfo / stop-reply packet / LC_NOTE "addrable bits" can all
specify either a single value for all address masks, or separate
masks for low and high memory addresses.

When the same number of addressing bits are used for all addresses,
we use the "low memory" address masks for everything. (or another
way, if the high address masks are not set, we use the low address
masks with the assumption that all memory is using the same mask --
the most common situation).

I was setting low and high address masks when I had a single value
from these metadata, but that gave the impression that the high
address mask was specified explicitly.  After living on the code
a bit, it's clearly better to only set the high address masks when
we have a distinct high address mask value.

This patch is the minor adjustment to behave that way.

Revert "[clang][Interp] Implement __builtin_strlen"

Fails Msan. Details in https://reviews.llvm.org/D155568

This reverts commit d425720a.
This reverts commit 91af0d0a.

CMake Warning (dev) in tools/dsymutil/CMakeLists.txt:
  A logical block opening on the line

    /Users/jiefu/llvm-project/llvm/tools/dsymutil/CMakeLists.txt:42 (if)

  closes on the line

    /Users/jiefu/llvm-project/llvm/tools/dsymutil/CMakeLists.txt:44 (endif)

  with mis-matching arguments.

If the original shape and the distributed shape is the same,
we don't distribute at all--every thread is handling the whole.

Reviewed By: hanchung

Differential Revision: https://reviews.llvm.org/D158235

Reviewed By: Peiming

Differential Revision: https://reviews.llvm.org/D158229

Drop unneeded 'case'. Clean up bracing & whitespace.

Approved By: nikic

Differential Revision: https://reviews.llvm.org/D158126

This reverts commit 84378476.
There is a build failure caused by this commit.

Differential Revision: https://reviews.llvm.org/D157670

This patch re-enabled auto as the default verification mode when
building with assertions or expensive checks. This was disabled in
c2d2f724 because of an issue with temp files on Windows, which was
fixed in 519490f26260.

Slightly refactor and optimize the code in preparation for
implementing grouping parameters for a single fix-it.

Reviewed by: NoQ (Artem Dergachev), t-rasmud (Rashmi Mudduluru)

Differential revision: https://reviews.llvm.org/D156474

I wrote some complicated conditionals for how to handle a partially
specified AddressableBits object in https://reviews.llvm.org/D158041 ,
and how to reuse existing masks if they were set and we had an
unspecified value.

I don't think this logic is the right thing to start
with.  Simplify back to the most straightforward
setting, where only the bits that have been specified
are set in the Process.

This reverts commit b96f6cf6
since it has broken some Windows build bots
(see https://reviews.llvm.org/D157204).
Will recommit a fixed version later.

This adds /Zi handling and explicitly ignores /Qembed_debug, which
should make our command line handling compatible enough with dxc that
we can share logic on compiler explorer.

Differential Revision: https://reviews.llvm.org/D158113

Differential Revision: https://reviews.llvm.org/D158112#inline-1530312

/Users/jiefu/llvm-project/mlir/lib/Dialect/MemRef/Utils/MemRefUtils.cpp:56:3: error: 'SmallVector' may not intend to support class template argument deduction [-Werror,-Wctad-maybe-unsupported]
  SmallVector indicesVec = llvm::to_vector(indices);
  ^
/Users/jiefu/llvm-project/mlir/include/mlir/Support/LLVM.h:69:7: note: add a deduction guide to suppress this warning
class SmallVector;
      ^
1 error generated.

From https://en.cppreference.com/w/cpp/language/decltype:
Note that if the name of an object is parenthesized, it is treated as an
ordinary lvalue expression, thus decltype(x) and decltype((x)) are often
different types.

Fixes #64786.

Differential Revision: https://reviews.llvm.org/D158155

Registering the SparsificationAndBufferization into a proper TD pass
has the advantage that it can be invoked and tested in isolation. This
change also moves some bufferization specific set up from the pipeline
file into the pass file, keeping the logic more locally.

Reviewed By: Peiming

Differential Revision: https://reviews.llvm.org/D158219