As per point 3 in [1]:

```
Accessor member functions are named with the non-public data member's
name, less the trailing underscore.  Mutator member functions are named
set_...
```

Originally we just followed the LLVM's style, which is incompatible with
Flang. This patch renames the accessors and mutators accordingly.

`getDiagnostics` and `GetDiagnostics` are replaced with one accessor:
`diagnostics`. `SetDiagnostics` was neither implemented nor used, so
it's deleted.

[1] https://github.com/llvm/llvm-project/blob/master/flang/docs/C++style.md#naming

Differential Revision: https://reviews.llvm.org/D90300

We were default initializing SymbolIDs before, which would leave
indeterminate values in underlying std::array.

This patch updates the underlying data initalization to be value-init and adds a
way to check for validness of a SymbolID.

Differential Revision: https://reviews.llvm.org/D90397

Use `--match-full-lines` to make sure that FileCheck doesn't match the
output against the `CHECK` lines (which, like other comments, are also
printed).

More specifically, we want to make sure that the following `check` in the
input file:
```
! CHECK: <some-fortran-input>
```
is matched by FileCheck with `<some-fortran-input>` in the generated
output. Without `--match-full-lines`, that check-line will be matched
with `!CHECK:  <some-fortran-input>` instead (which is also
printed together with other contents of the file).

Adding `--match-full-lines` makes the tests stricter and this change
revealed that some `check`s were passing only because that flag was
missing. These are updated accordingly.

Reviewed By: CarolineConcatto, sameeranjoshi

Differential Revision: https://reviews.llvm.org/D90306

Introduce a separate thread that will kill `clangd-index-server` after 10 seconds regardless. This helps shut down the test if the server hangs and `stderr.readline()` does not contain inititalizatiton message. It prevents "necessary" waiting delay for the server warm-up and only introduces additional delay if the test fails.

It also makes use of `subprocess.Popen.kill()` which is a portable way of handling process shutdown and avoids using signals.

Reviewed By: kadircet

Differential Revision: https://reviews.llvm.org/D90590

Differential Revision: https://reviews.llvm.org/D90453

These sections are implicit and handled a bit differently.
Currently the "Offset" is ignored for them.
This patch fixes an issue.

Differential revision: https://reviews.llvm.org/D90446

This reverts commit 8b281bfa.

Only the aliases 'xzr' and 'sp' exist for the physical register x31.
The reason for wanting to remove the alias 'x31' is because it allows users
to write invalid asm that is not accepted by the GNU assembler.

Is there any objection to removing this alias? Or do we want to keep
this for compatibility with existing code that uses w31/x31?

Differential Revision: https://reviews.llvm.org/D90153

Reviewed By: kadircet

Differential Revision: https://reviews.llvm.org/D90291

Google test matcher `DeclKind` uses `NamedDecl::getDeclKindName()` to compare its result with expected declaration name.
Both, returned value of this function and the expected kind name argument have type `const char *`, so this matcher effectively
compares two pointers instead of the respective strings.

The test was passing on most platforms because compilers mostly were able to coalesce these string literals.

Patch By: Ilya Golovenko

Reviewed By: hokein

Differential Revision: https://reviews.llvm.org/D90384

When validating C3 in (sext_inreg (or (shl X, C2), (shr (and Y, C3), C1)), i32)
we are truncating it to 32 bits before checking its value. We need
to check all 64 bits.

Variable InnerIsSel references FalseRes, while FalseRes might be
zext/sext. So InnerIsSel should reference SetOrSelCC, otherwise a crash
will happen.

Reviewed By: steven.zhang

Differential Revision: https://reviews.llvm.org/D90142

The function is matching (sext_inreg (or (shl X, C2), (shr (and Y, C3), C1))),
with appropriate checks for the constants to be a rotate. But it
fails to check that X and Y are the same which is also necessary.

fshl/fshr intrinsics turn into rotl/rotr ISD opcodes and we don't
have a complete set of patterns.

We pattern match rotl, but we have a custom match for rori that gets
priority. We don't pattern match rotr and we don't have patterns
or custom code for rori from rotr.

Not needed after 22626135.

Fix failure in new test from 0949f96d:
Don't match exact file path separator.

Should fix:
http://lab.llvm.org:8011/#/builders/119/builds/437/steps/9/logs/FAIL__Clang__memory-profile-filename_c

* Finishes support for Context, InsertionPoint and Location to be carried by the thread using context managers.
* Introduces type casters and utilities so that DefaultPyMlirContext and DefaultPyLocation in method signatures does the right thing (allows explicit or gets from the thread context).
* Extend the rules for the thread context stack to handle nesting, appropriately inheriting and clearing depending on whether the context is the same.
* Refactors all method signatures to follow the new convention on trailing parameters for defaulting parameters (loc, ip, context). When the objects are carried in the thread context, this allows most explicit uses of these values to be elided.
* Removes the style guide section on putting accessors to construct global objects on the PyMlirContext: this style fails to make good use of the new facility since it is often the only thing remaining needing an MlirContext.
* Moves Module parse/creation from mlir.ir.Context to static methods on mlir.ir.Module.
* Moves Context.create_operation to a static Operation.create method.
* Moves Type parsing from mlir.ir.Context to static methods on mlir.ir.Type.
* Moves Attribute parsing from mlir.ir.Context to static methods on mlir.ir.Attribute.
* Move Location factory methods from mlir.ir.Context to static methods on mlir.ir.Location.
* Refactors the std dialect fake "ODS" generated code to take advantage of the new scheme.

Differential Revision: https://reviews.llvm.org/D90547

Before 6db314e8, when running cmake with clang, libcxx, and
compiler-rt enabled, building `ninja all` would run the
generate-cxx-headers target, due to the sanitizers depending on it.

After 6db314e8, if LIBCXX_ENABLE_SHARED and LIBCXX_ENABLE_STATIC
and LIBCXX_INCLUDE_TESTS and LIBCXX_ENABLE_EXPERIMENTAL_LIBRARY are
disabled (https://reviews.llvm.org/D82702#2153627), `ninja all`
no longer copies the libcxx headers, which means clang can't compile
programs like `#include <string>` on macOS.

Explicitly add the copy target to the all target to restore the old
behavior.

Reviewed By: qcolombet

Differential Revision: https://reviews.llvm.org/D86864

We have added a new load/store cluster algorithm in D85517. However, AArch64 see
some compiling deg with the new algorithm as the IsReachable() is not cheap if
the DAG is complex. O(M+N) See https://bugs.llvm.org/show_bug.cgi?id=47966
So, this patch added a heuristic to switch to old cluster algorithm if the DAG is too complex.

Reviewed By: Owen Anderson

Differential Revision: https://reviews.llvm.org/D90144

Similar to -fprofile-generate=, add -fmemory-profile= which takes a
directory path. This is passed down to LLVM via a new module flag
metadata. LLVM in turn provides this name to the runtime via the new
__memprof_profile_filename variable.

Additionally, always pass a default filename (in $cwd if a directory
name is not specified vi the = form of the option). This is also
consistent with the behavior of the PGO instrumentation. Since the
memory profiles will generally be fairly large, it doesn't make sense to
dump them to stderr. Also, importantly, the memory profiles will
eventually be dumped in a compact binary format, which is another reason
why it does not make sense to send these to stderr by default.

Change the existing memprof tests to specify log_path=stderr when that
was being relied on.

Depends on D89086.

Differential Revision: https://reviews.llvm.org/D89087

Strengthening nowrap flags is relatively expensive. Make sure we
only do it if we're actually going to use the flags -- we don't
use them for many recursive invocations. Additionally, if we're
reusing an existing SCEV node, there's no point in trying to
strengthen the flags if we don't have any new baseline facts.

This change falls slightly short of being NFC, because the way
flags during add+addrec / mul+addrec folding are handled may be
more precise (as less operands are included in the calculation).

The fshr intrinsic with same inputs produces rotr ISD node. The
fshl intrinsic produces rotl ISD node.

There were only test cases and isel patterns for the fshl/rotl case.
This patch adds fshr/rotr test cases.

This reverts 78191725 and recommits
78191725.

I've changed getRegForInlineAsmConstraint to not use a std::pair
of Register in a previous commit. Hopefully that fixes the reported
issue with expensive checks on Windows. I'm still not sure exactly
why this commit removing an include affected a different file.

Original message:

RISCVRegisterInfo.h is part of the CodeGen layer. The Utils library
is intended to be shared with the MC layer so shouldn't use files
from the CodeGen layer.

The register enum names are already available from
RISCVMCTargetDesc.h. It appears what was coming from this include
was a transitive include of the Register class which I've replaced
with MCRegister. Register has a constructor from MCRegister so it
should be convertible.

The return value of this interface still uses an 'unsigned' on all
targets. So we convert Register back to unsigned at the end.

I'm hoping this will prevent the issue that caused the revert of
D90322.

Instead of performing a sequence of pairwise additions, directly
construct a multi-operand add expression.

This should be NFC modulo any SCEV canonicalization deficiencies.

When deleting a VPValue, all users must already by deleted. Add an
assertion to make sure and catch violations.

Unsigned 32-bit or shorter integer to ppcf128 conversion are currently
expanded as signed-to-double with an extra fadd to 'complement'. But on
PowerPC we have native instruction to directly convert unsigned to
double since ISA v2.06. This patch exploits it.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D89786

It should be enabled only when the load alignment is at least 8-byte.

Fixes: SWDEV-256824

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D90404

This test was checking behaviour that only exists in the debug
configuration so will fail in release builds.

Perhaps there is way to keep this test around and only run
it in debug builds but for now I'm removing so fix the
release builders.

Differential Revision: https://reviews.llvm.org/D90542