After 0504e932

Break out and refactor AArch64 & ARM intrinsic updating.  There's a fair amount of comonality, but let's avoid continually checking the same prefixes.

…te initialization" (#76272)""

With updates the libc++ tests.

This reverts commit 2205d233 and relands
86dc6e15 and
7ab16fb5.

Original commit was reverted because of failing libc++ tests, see #76232
for the discussion.

The errors in the tests are spurious in the first place (coming from
initialization of invalid classes), so update the tests to match new
behavior that does not show those errors.

The original patch was written by @ilya-biryukov 

To fix the CI two libc++ tests are temporary disabled for clang-18.

This patch improves the value solving of select at use if the condition
is an icmp and we know the result of comparison from
`LVI->getPredicateAt`.

Compile-time impact:
http://llvm-compile-time-tracker.com/compare.php?from=7e405eb722e40c79b7726201d0f76b5dab34ba0f&to=3c315b1ddcb0ad82554b33f08b9356679fae4bb7&stat=instructions:u

|stage1-O3|stage1-ReleaseThinLTO|stage1-ReleaseLTO-g|stage1-O0-g|stage2-O3|stage2-O0-g|stage2-clang|
|--|--|--|--|--|--|--|
|-0.01%|+0.01%|-0.00%|-0.00%|-0.08%|+0.02%|-0.01%|

We can't use the script as we need to keep the shuffle mask constant pool checks, but do more than just check that a second vperm isn't generated

Summary:
This formats something according to the style, and again attempts to fix
this failing on the BE PPC test. Sorry for the spam, these commits are
the only way I can check it because the failure isn't local.

A simple clause that is permitted on a few different constructs,
  'default' takes a required parameter of either 'none' or 'present'.
  This patch implements parsing for it.

This patch canonicalizes `switch(X << C)` to `switch(X)`. If the shift
may wrap, an and instruction will be created to mask out all of the
shifted bits.
Alive2: https://alive2.llvm.org/ce/z/wSsL5y

NOTE: We can relax the one-use constraint. But I don't see any benefit
in my benchmark.

Compile-time impact:
http://llvm-compile-time-tracker.com/compare.php?from=a776740d6296520b8bde156aa3f8d9ecb32cddd9&to=6dd783b9f90ae5f258102d732953567d7e317c02&stat=instructions%3Au

|stage1-O3|stage1-ReleaseThinLTO|stage1-ReleaseLTO-g|stage1-O0-g|stage2-O3|stage2-O0-g|stage2-clang|
|--|--|--|--|--|--|--|
|-0.00%|+0.01%|-0.02%|-0.01%|+0.02%|-0.00%|+0.01%|

The LLDB expression parser relies on using the external AST source
support in LLDB. This allows us to find a class at the root namespace
level, but it wouldn't allow us to find nested classes all of the time.
When LLDB finds a class via this mechanism, it would be able to complete
this class when needed, but during completion, we wouldn't populate
nested types within this class which would prevent us from finding
contained types when needed as clang would expect them to be present if
a class was completed. When we parse a type for a class, struct or
union, we make a forward declaration to the class which can be
completed. Now when the class is completed, we also add any contained
types to the class' declaration context which now allows these types to
be found. If we have a struct that contains a struct, we will add the
forward declaration of the contained structure which can be c ompleted
later. Having this forward de...

Summary:
This test fails because AMDGPU has a check for little-endianness before
returning the architecture. This test attempts to force the type to be
considered little-endian for the purpose of this test.

[RISCV] Don't call use_nodbg_operands for physical registers in RISCVOptWInstrs hasAllNBitUsers. (#77032)

The ADDIW in the new test case was incorrectly removed due to
incorrectly following the x10 register from the return value back to the
argument. This is due to use_nodbg_operands returning every instruction
that uses a physical register regardless of the data flow.

Relaxed a bit the opcode checks to make the test less sensitive to
changes resulting in opcode numbering.

Summary:
This did not need a separate struct because it is not past the
"architecture specific" ones in the identifier. This was accidentally
left when it was added somewhere else and caused unused variable
warnings.

Summary:
This patch fixes up the `makeTriple()` interface to emit append the
operating system information when it is readily avaialble from the ELF.
The main motivation for this is so the GPU architectures can be easily
identified correctly when given and ELF. E.g. we want
`amdgpu-amd-amdhsa` as the output and not `amdgpu--`.

This required adding support for the CUDA OS/ABI, which is easily found
to be `0x33` when using `readelf`.

GCC reports an instance of -Warray-bounds in block_offset.  Reimplement
block_offset in terms of memcpy_inline which was created to avoid this
diagnostic. See the linked issue for the full trace of diagnostic.

Fixes: https://github.com/llvm/llvm-project/issues/76877

Fixes: #77071
`SubstituteDeducedTypeTransform` will transform type and it will visit
uninstantiated `ExceptionSpecInfo`, which will cause odd behavior.

Since D154036 landed (2a65d038 on July 7, 2023), I've been seeing
many (40-50) libomptarget test failures with errors like the following
on some of our test systems:

```
/auto/software/gcc/x86_64/gcc-11.1.0/lib/gcc/x86_64-pc-linux-gnu/11.1.0/../../../../include/c++/11.1.0/cstdio:99:11: error: no member named 'fpos_t' in the global namespace
   99 |   using ::fpos_t;
      |         ~~^
```

This patch fixes that and doesn't break our other test sytems. I've
looked through the glibc history and at LLVM's libc stdio.h to give me
confidence that this solution should work on other systems. Of course,
there might be use cases I've overlooked, so feedback is appreciated.

Analogous to func.call use FlatSymbolRefAttr to reference the
corresponding mesh.

The change is fairly mechanical:
1. Factor code from `FastISel::selectIntrinsicCall`, which converts
debug intrinsics into debug instructions, into functions (NFC).
2. Call those functions for DPValues attached to instructions too.

The test updates look the same as other RemoveDIs changes: re-run the
tests with `--try-experimental-debuginfo-iterators`, which checks the
output is identical using the new debug info format (if it has been
enabled in the cmake configuration).

Depends on #76941 (otherwise some modified tests spuriously fail).

Choose correct type for updated loop boundaries after scf loop
normalization, do not force chosen type to IndexType

`FusionPredicate` is used to predicate if target instruction matches
 the requirement. The targets can be firstMI, secondMI or both.

The `Fusion` contains a list of `FusionPredicate`. The generated code
will be like:
```
bool isNAME(const TargetInstrInfo &TII,
            const TargetSubtargetInfo &STI,
            const MachineInstr *FirstMI,
            const MachineInstr &SecondMI) {
  auto &MRI = SecondMI.getMF()->getRegInfo();
  /* Predicates */
  return true;
}
```

A boilerplate class called `SimpleFusion` is added. `SimpleFusion` has
a predefined structure of predicates and accepts predicate for
`firstMI`, predicate for `secondMI` and epilog/prolog as arguments.
The generated code for `SimpleFusion` will be like:
```
bool isNAME(const TargetInstrInfo &TII,
            const TargetSubtargetInfo &STI,
            const MachineInstr *FirstMI,
            const MachineInstr &SecondMI) {
  auto &MRI = SecondMI.getMF()->getRegInfo();
  /* Prolog */
  /* Predicate for `SecondMI` */
  /* Wildcard */
  /* Predicate for `FirstMI` */
  /* Check One Use */
  /* Tie registers */
  /* Epilog */
  return true;
}
```

Currently, the AsmWriter can print DPValues, but does not consider them
when creating slots for metadata, which can result in erroneous output
where metadata is numbered incorrectly. This patch modifies the
ModuleSlotTracker to correctly track slots for metadata that appears in
DPValues.

This template is no longer used.

Fixes #74601

Tihs PR adds `clock` and `clock64` special registers to NVVM dialect.

We try to use X32 for gnux32 triples only.

We try to use X32 for gnux32 triples only.

We try to use X32 for gnux32 triples only.

We try to use X32 for gnux32 triples only.

We try to use X32 for gnux32 triples only.

Specification: https://en.cppreference.com/w/c/numeric/math/nan

This patch canonicalizes `switch(C-X)` to `switch(X)`.

Compile-time impact:
http://llvm-compile-time-tracker.com/compare.php?from=7954c57124b495fbdc73674d71f2e366e4afe522&to=31a9adff1e633f0f3c423fb8487fc15d17e171f2&stat=instructions:u

|stage1-O3|stage1-ReleaseThinLTO|stage1-ReleaseLTO-g|stage1-O0-g|stage2-O3|stage2-O0-g|stage2-clang|
|--|--|--|--|--|--|--|
|-0.01%|+0.02%|+0.02%|+0.05%|-0.07%|-0.02%|-0.02%|