hsa_amd_memory_async_copy can handle device to device copies if passed
the corresponding parameters.

No functional change - currently D2D copy goes through a fallback in
libomptarget that stages through a host malloc, after this it goes
directly through HSA.

Works under exactly the situations that HSA works. Verified locally on a
performance benchmark. Hoping to attract further testing from internal
developers after it lands.

This adds library support for these two new level formats.

Move comments to the line before the member variables and add missing
periods.

Exclude from Solaris due to failure:

https://lab.llvm.org/staging/#/builders/8/builds/584

VTs on already selected instructions can be arbitrary. Reviewing
the isel table I see i32 used for instructions that are part of
multiple instruction output patterns. Looks like tblgen to just
picks the lowest numbered MVT that is legal for the destination
register class of the instruction.

Seems better to just not check types for already selected nodes.

This fixes a crash when `splitAndWriteThinLTOBitcode()` hits a
declaration with type metadata. For example, such declarations can be
generated by the `EliminateAvailableExternally` pass.

Fix a crash reported in #64331. The crash is described in the following
comment:

> It looks like the bug is being caused by the command line argument
--scf-parallel-loop-tiling=parallel-loop-tile-sizes=0. More
specifically, --scf-parallel-loop-tiling=parallel-loop-tile-sizes sets
the tileSize variable to 0 on [this
line](https://github.com/llvm/llvm-project/blob/7cc1bfaf371c4a816cf4e62fe31d8515bf8f6fbd/mlir/lib/Dialect/SCF/Transforms/ParallelLoopTiling.cpp#L67).
tileSize is then used on [this
line](https://github.com/llvm/llvm-project/blob/7cc1bfaf371c4a816cf4e62fe31d8515bf8f6fbd/mlir/lib/Dialect/SCF/Transforms/ParallelLoopTiling.cpp#L117)
causing a divide by zero exception.

This PR will:

1. Call `signalPassFail()` when 0 is passed as a tile size.
2. Avoid the divide by zero that causes the crash. 

Note: This is my first PR for MLIR, so please liberally critique it.

The OpenACC standard mentions directive format for fixed form source
files. The following sentinels are accepted:

```
!$acc directive-name [clause-list]
c$acc directive-name [clause-list]
*$acc directive-name [clause-list]
```

Update the parser to accepts these. A new option is added to `bbc` so
the change can be tested.

Remove usage of getElementType in OpenMPTranslation to pave way for
switching to opaque pointers in MLIR and Flang. The approach chosen
stores the elementType in a new field in MapInfo called varType. A
similar approach was chosen for AtomicReadOp in

https://github.com/llvm/llvm-project/commit/81767f52f49339be2c78fc9bf831856b9f57e2f0

Enable testing for two NDK configurations:
 - android-ndk-21-def-x86
 - android-ndk-33-goog-x86_64

Fixes: https://github.com/llvm/llvm-project/issues/69270

I would like to start a discussion about the ways for modifying
the current trampolines approach for Fortran internal procedures
used as actual arguments or pointer targets.

As Peter Klausler noted before the current approach implies security
risks due to writeable and executable stack requirement. We may need
to agree on a new scheme that does not have this issue.

.. and move bitcast from a constant for integer-based types into a
better suited location. It solves the mystery of why we sometimes used
`mov.u32` and sometimes `mov.b32` for loading constants. Now they all
should use `.b32`

Fixes #69237.

This patch updates the documentation to match recent changes and make it
more clear. More specifically, the process for installing sphinx has
changed with the transition to myst with the requirements.txt in
llvm/docs being the preferred method for installation now. In addition,
the docs-lldb-html target is never generated if swig isn't installed, so
having something expliti in the documentation section (even if it is
mentioned as a dependency of lldb itself above) probably doesn't hurt.

These now match the settings for the asan allocator on Fuchsia+RISCV.

This will make it easier to read rather than using SizeClassMap in the
same namespace.

This reverts commit 20fc8e8d.  As pointed out in review of the mentioned follow up patch, this gets the predicate wrong.  We need not simply VL being unchanged, but VLMAX being unchanged.  Given that the code structure I'd introduced here is simply confusing.

Removed TODOs, FIXMEs and long notes that are more suited for design
doc.

This attribute allows user to specify type of the bitfield that will be
emitted to debug info without affecting semantics of the program. Since
it doesn't affect semantics, this attribute can be safely ignored by
other compilers.

This is useful when user is forced to use the same type for all
bitfields in a class to get better
[layout](https://godbolt.org/z/ovWqzqv9x) and
[codegen](https://godbolt.org/z/bdoqvz9e6) from MSVC, because it allows
debuggers to interpret the value of bitfield in the most human-friendly
way (e.g. when value actually comes from an enum). This is driven by my
work on LLDB formatters for Clang. I have two use cases for this:
```cpp
namespace Clang {
class Type {
  enum TypeClass { ... };
  struct TypeBitfields {
    [[clang::preferred_type(clang::Type::TypeClass)]] unsigned TC: 8;
    [[clang::preferred_type(bool)]] mutable unsigned FromAST : 1;
  };
};
}
```

[AMDGPU] Force the third source operand of the MAI instructions to VGPR if no AGPRs are used. (#69720)

eaf85b9c28 "[AMDGPU] Select VGPR versions of MFMA if possible" prevents
the compiler from reserving AGPRs if a kernel has no inline asm
explicitly using AGPRs, no calls, and runs at least 2 waves with not
more than 256 VGPRs. This, in turn, makes it impossible to allocate AGPR
if necessary. As a result, regalloc fails in case we have an MAI
instruction that has at least one AGPR operand.
This change checks if we have AGPRs and forces operands to VGPR if we do
not have them.

---------

Co-authored-by: Alexander Timofeev <alexander.timofeev@amd.com>

Very straight forward, but worth landing on it's own in advance of a
more complicated generalization.

Patches now go to PRs, mention the Discord server as well as the forum.

Summary:
We previously had to disable these string functions because they were
not compatible with the definitions coming from the GNU / host
environment. The GPU, when exporting its declarations, has a very
difficult requirement that it be compatible with the host environment as
both sides of the compilation need to agree on definitions and what's
present.

This patch more or less gives up an just copies the definitions as
expected by `glibc` if they are provided that way, otherwise we fall
back to the accepted way. This is the alternative solution to an
existing PR which instead disable's GCC's handling.

This means you don't have to do RegisterField("", 0, 0), you can do
RegisterField("", 0).

Which is useful for testing and even more useful when we are writing
definitions of real registers which have 10s of single bit fields.

D142966 made it so that st2 that do not start at element 0 use zip2
instead of st2. This extends that to any 64bit store that has a nearby
load that can better become a LDP operation, which is expected to have a
higher throughput. It searches up to 20 instructions away for a store to
p+16 or p-16.

Fixed a warning encountered during Windows compilation:
- narrowing conversion size_t -> int32_t
- unary minus operator applied to unsigned type, result still unsigned

In emscripten we have a build mode (the default actually) where the
runtime never exits and therefore `__cxa_atexit` is a dummy/stub
function that does nothing. In this case we would like to be able
completely DCE any otherwise-unused global dtor functions.

Fixes: https://github.com/emscripten-core/emscripten/issues/19993

[llvm][test][Hexagon] NFC: test commit

All error messages here already contain the path to the plugin, so no
need to repeat it in opt.cpp.

This patch moves the template files for the various scripting
affordances to a separate directory.

This is a preparatory work for upcoming improvements and consolidations
to other scripting affordances.

Differential Revision: https://reviews.llvm.org/D159310



Signed-off-by: Med Ismail Bennani <ismail@bennani.ma>

As we're consolidating and  streamlining the various scripting
affordances of lldb, we keep creating new interface files.

This patch groups all the current interface files into a separate sub
directory called `Interfaces` both in the core `Interpreter` directory
and the `ScriptInterpreter` plugin directory.

Differential Revision: https://reviews.llvm.org/D158833



Signed-off-by: Med Ismail Bennani <ismail@bennani.ma>

This reverts commit 708808e8 which is
causing crashes on valid code, see
https://github.com/llvm/llvm-project/pull/69049#issuecomment-1775538177.

Revert [clang] Handle templated operators with reversed arguments and [STLExtras] Undo C++20 hack (#69937)

This breaks C++20 build of LLVM by clang 17 and earlier.
Next steps should be reduce error to a warning for
https://godbolt.org/z/s99bvq4sG
b100ca6f219fda1fed5b92aba8471aa9a6ef8906 or similar should be reapplied
after the bug fix reached clang-18.

This has been very useful lately debugging remote
connections. In some cases it's probably better
than our own logging.

[clang][Interp] Only evaluate the source array initialization of an `ArrayInitLoopExpr` once (#68039)

This patch implements an `OpaqueValueExpr` caching functionality in `Interp`
by storing the result of the expression in a local variable.