- Nov 22, 2022
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Pavel Labath authored
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Oleksandr "Alex" Zinenko authored
Summary is the short one.
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Paul Walker authored
When performing shrinking int/fp conversions the predicate should be created to match the original fixed length vector type so the unused lanes don't trigger side effects. This patch also includes related refactoring to better detect such issues and streamline the code a little. Differential Revision: https://reviews.llvm.org/D138351
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Philip Pfaffe authored
Parsing DWARF expressions currently does not support DW_OPs that are vendor extensions. With this change expression parsing calls into SymbolFileDWARF for unknown opcodes, which is the semantically "closest" plugin that we have right now. Plugins can then extend SymbolFileDWARF to add support for vendor extensions. Reviewed By: labath Differential Revision: https://reviews.llvm.org/D137247
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Pierre van Houtryve authored
Unused function since D134967 Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D138493
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Jan Sjodin authored
This patch introudces the OpenMPIRBuilderConfig class which contains various flags that are needed to lower OMP constructs to LLVM-IR. The purpose is to keep the flags in one place so they do not have to be passed in every time. The flags can be set optionally since some uses cases don't rely on functions that depend on these flags. Reviewed By: jdoerfert, tschuett Differential Revision: https://reviews.llvm.org/D138220
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Ties Stuij authored
This patch implements the 2022 Architecture General Data-Processing Instructions They include: Common Short Sequence Compression (CSSC) instructions - scalar comparison instructions SMAX, SMIN, UMAX, UMIN (32/64 bits) with or without immediate - ABS (absolute), CNT (count non-zero bits), CTZ (count trailing zeroes) - command-line options for CSSC Associated with these instructions in the documentation is the Range Prefetch Memory (RPRFM) instruction, which signals to the memory system that data memory accesses from a specified range of addresses are likely to occur in the near future. The instruction lies in hint space, and is made unconditional. Specs for the individual instructions can be found here: https://developer.arm.com/documentation/ddi0602/2022-09/Base-Instructions/ contributors to this patch: - Cullen Rhodes - Son Tuan Vu - Mark Murray - Tomas Matheson - Sam Elliott - Ties Stuij Reviewed By: lenary Differential Revision: https://reviews.llvm.org/D138488
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Pierre van Houtryve authored
Adds FP CCs opcodes/selection logic, including src mods selection Depends on D136591, D136448 Resolves #58326 (https://github.com/llvm/llvm-project/issues/58326) Reviewed By: arsenm, foad Differential Revision: https://reviews.llvm.org/D136592
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Youling Tang authored
If `pathname` is an empty string and the AT_EMPTY_PATH flag is specified in `flags`, statx `pathname` argument is of type `const char *restrict`, so it should be `""` instead of `0`. Reviewed By: SixWeining, xen0n, xry111, lixing-star Differential Revision: https://reviews.llvm.org/D138414
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Valentin Clement authored
As suggested on D138129, switching rteurn of CollectBindings function to SymbolVector. Reviewed By: jeanPerier Differential Revision: https://reviews.llvm.org/D138419
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Youling Tang authored
Enable scudo on LoongArch64 on both clang side and compiler-rt side. Reviewed By: SixWeining Differential Revision: https://reviews.llvm.org/D138350
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Valentin Clement authored
Initialization of unlimited polymorphic descriptor was raising an error. This patch sets a default size and type code for unlimited polymoprhic descriptor that will be updated once allocated/assigned. Reviewed By: PeteSteinfeld Differential Revision: https://reviews.llvm.org/D138479
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David Green authored
This is some quick debug messages for the SelectOptimize pass, adding some information for the costs that are measured from getInstructionCost calls, and re-using the existing optimization remarks to print some information about if transforms were performed or not. Differential Revision: https://reviews.llvm.org/D138108
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Dmitry Bushev authored
Marking rs1 (memory offset base) as memory operand provides additional semantic value to this operand that can be used by different tools (e.g. llvm-exegesis). This change does not affect neigther Isel nor assembler. However it required some tweaks in tablegen compressed inst emmiter. Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D136847
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Matthias Springer authored
`DialectAnalysisState` is now `OneShotAnalysisState::Extension`. This state extension mechanism is needed only for One-Shot Analysis, so it is moved from `BufferizableOpInterface.h` to `OneShotAnalysis.h`. Extensions are now identified via TypeIDs instead of StringRefs. The API of state extensions is cleaned up and follows the same pattern as other extension mechanisms in MLIR (e.g., `transform::TransformState::Extension`). Also delete some dead code. Differential Revision: https://reviews.llvm.org/D135051
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Fahad Nayyar authored
This change fixes a typo in a warning message. rdar://79707705
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Thomas Symalla authored
An extractelt with a constant index which extracts an element from the two vector operands of a select can be directly folded into a select. extractelt (select %x, %vec1, %vec2), %const -> select %x, %vec1[%const], %vec2[%const] Note: the implementation currently only works for constant vector operands. Reviewed By: foad, spatel Differential Revision: https://reviews.llvm.org/D137934
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Stefan Gränitz authored
In release mode `arc-exceptions-seh.mm` fails. It needs `-enable-objc-arc-opts=false` to skip ObjC ARC optimizations. Reviewed By: triplef Differential Revision: https://reviews.llvm.org/D137942
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Nuno Lopes authored
This reverts commit f50423c1.
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chenglin.bi authored
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esmeyi authored
Summary: -xcoff-traceback-table is a default option on AIX regardless of optimization and debug levels. An error of relocation for paired relocatable term is not yet supported in XCOFFObjectWriter::recordRelocation occurred when both of the -xcoff-traceback-table and -function-sections are enabled. The root cause is that we missed to calculate the symbols difference as absolute value before adding fixups when symbol_A without the fragment set is the csect itself and symbol_B is in it. This patch only sets the fragment for XMC_PR csects because we don't have other cases that hit this problem yet. Reviewed By: DiggerLin, hubert.reinterpretcast Differential Revision: https://reviews.llvm.org/D137230
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Manuel Brito authored
Differential Revision: https://reviews.llvm.org/D138483
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Stefan Gränitz authored
Pushing the `CatchRetScope` early causes cleanups for catch parameters to be emitted in the basic block of the catch handler instead of the `catchret.dest` block. This is important because the latter is not part of the catchpad and this caused code truncations due to ARC PreISel intrinsics in WinEHPrepare. Reviewed By: rnk Differential Revision: https://reviews.llvm.org/D137939
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Piotr Sobczak authored
Add missing assembler/disassembler tests for INSTID_SALU_CYCLE_2 and INSTID_SALU_CYCLE_3 which are possible arguments in S_DELAY_ALU. Differential Revision: https://reviews.llvm.org/D138482
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Lorenzo Chelini authored
Avoid duplicate code by using an existing helper function to interchange a vector based on a permutation. Address comments emerged after landing D138119. Reviewed By: nicolasvasilache Differential Revision: https://reviews.llvm.org/D138480
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Matthias Springer authored
Dim sizes of `scf.foreach_thread` op results match the dim sizes of their respective tied shared_outs operands. Differential Revision: https://reviews.llvm.org/D138484
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Alexander Belyaev authored
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Alexander Belyaev authored
Differential Revision: https://reviews.llvm.org/D138478
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Benjamin Kramer authored
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zhanghb97 authored
This patch adds the initial VP intrinsic integration test on the host backend and RVV emulator. Please see more detailed [discussion on the discourse](https://discourse.llvm.org/t/mlir-vp-ops-on-rvv-backend-integration-test-and-issues-report/66343). - Run the test cases on the host by configuring the CMake option: `-DMLIR_INCLUDE_INTEGRATION_TESTS=ON` - Build the RVV environment and run the test cases on RVV QEMU by [this doc](https://gist.github.com/zhanghb97/ad44407e169de298911b8a4235e68497). Reviewed By: aartbik Differential Revision: https://reviews.llvm.org/D137816
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Han-Kuan Chen authored
Differential Revision: https://reviews.llvm.org/D137688
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WuXinlong authored
This patch add the support of RISCV Zca ext `Zca` is a subset of C extension instructions that are compatible with the Zc extension. So this patch implements Zca code generation with reference to the C extension and sets the 2-byte alignment for the Zca extension, just like C extension does. Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D130483
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Pierre van Houtryve authored
Makes the SRC_(SHARED|PRIVATE)_(BASE|LIMIT) registers 64 bit instead of 32. They're still usable as 32 bit operands by using the _LO suffix. Preparation for D137542 Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D137767
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Valentin Clement authored
This reverts commit 97e8eeb7.
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Max Kazantsev authored
Currently, it just returns exact exit count. This is a refectoring step before it is actually implemented.
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gonglingqin authored
Add missing dependency for loongarch-resource-headers. This patch refers to D126892 to repair same error. Differential Revision: https://reviews.llvm.org/D138403
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Valentin Clement authored
As suggested on D138129, switching rteurn of CollectBindings function to SymbolVector. Reviewed By: jeanPerier Differential Revision: https://reviews.llvm.org/D138419
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Valentin Clement authored
When the rhs is non-polymorphic the type descriptor should not be propagated. An error in the EmboxOp verifier was raised in that case. This patch propagate the type descriptor only if the result type of the EmboxOp operation is polymorphic. Reviewed By: PeteSteinfeld Differential Revision: https://reviews.llvm.org/D138442
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Alvin Wong authored
Fixes https://github.com/llvm/llvm-project/issues/59021 Reviewed By: #libc, philnik Differential Revision: https://reviews.llvm.org/D138268
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