- Dec 05, 2023
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Kamau Bridgeman authored
These test cases fail when the libcxx and libcxxabi runtimes are built on Linux PowerPC. XFailing them until the issue is resolved.
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Tobias Gysi authored
This commit fixes a compilation warning caused by the printExpressionArg function that previously returned LogicalResult instead of void. The warning has been introduced by #73367.
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Durga authored
Add: * an Op for 'cp.async.mbarrier.arrive', targeting the nvvm_cp_async_mbarrier_arrive* family of intrinsics. * The 'noinc' intrinsic property is modelled as a default-valued-attr of type I1. * Test cases are added to verify the Op as well as the intrinsic lowering. Signed-off-by:Durgadoss R <durgadossr@nvidia.com>
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vdonaldson authored
Implement a selection of intrinsic module procedures that involve exceptions. - IEEE_GET_FLAG - IEEE_GET_HALTING_MODE - IEEE_GET_MODES - IEEE_GET_STATUS - IEEE_LOGB - [f23] IEEE_MAX, IEEE_MAX_MAG, IEEE_MAX_NUM, IEEE_MAX_NUM_MAG - [f23] IEEE_MIN, IEEE_MIN_MAG, IEEE_MIN_NUM, IEEE_MIN_NUM_MAG - IEEE_QUIET_EQ, IEEE_QUIET_GE, IEEE_QUIET_GT, - IEEE_QUIET_LE, IEEE_QUIET_LT, IEEE_QUIET_NE - IEEE_SET_FLAG - IEEE_SET_HALTING_MODE - IEEE_SET_MODES - IEEE_SET_STATUS - IEEE_SIGNALING_EQ, IEEE_SIGNALING_GE, IEEE_SIGNALING_GT, - IEEE_SIGNALING_LE, IEEE_SIGNALING_LT, IEEE_SIGNALING_NE - IEEE_SUPPORT_FLAG - IEEE_SUPPORT_HALTING
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Natalie Chouinard authored
Add spirv-dis (disassembler) and spirv-val (validator) from SPIRV-Tools as external dependencies for testing the SPIR-V backend. These tools are test dependencies only. SPIR-V backend tests now have a dependency on the spirv-dis and spirv-val targets when the `LLVM_INCLUDE_SPIRV_TOOLS_TESTS` cmake variable is set, which allows additional test files with the `REQUIRES: spirv-tools` constraint to run, along with additional `RUN: %if spirv-tools ...` lines in existing tests. All other SPIR-V backend tests will run normally when `LLVM_INCLUDE_SPIRV_TOOLS_TESTS` is not set. Several tests are included to show these tools' use, however more tests will be migrated and added later. * OpVariable_order.ll shows how spirv-val can catch bugs in the backend. * basic_int_types_spirvdis.ll shows how tests can be much shorter and more readable by FileChecking the spirv-dis output. * basic_int_types.ll shows how an additional RUN line can add validation to existing tests. RFC: https://discourse.llvm.org/t/rfc-add-a-test-dependency-on-spirv-tools/75135
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Boian Petkantchin authored
Add definitions for broadcast, gather, receive, reduce, scatter, send and shift.
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Benjamin Maxwell authored
This patch removes the ArmSMETypeConverter, and instead updates `populateArmSMEToLLVMConversionPatterns()` to add an ArmSME vector type conversion to the existing LLVMTypeConverter. This makes it easier to add these patterns to an existing `-to-llvm` lowering pass.
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Andrzej Warzyński authored
Following the discussion here: * https://github.com/llvm/llvm-project/pull/72105 this patch makes the `TransposeOpLowering` configurable so that one can select whether to favour `vector.shape_cast` over `vector.transpose`. As per the discussion in #72105, using `vector.shape_cast` is very beneficial and desirable when targeting `LLVM IR` (CPU lowering), but won't work when targeting `SPIR-V` today (GPU lowering). Hence the need for a mechanism to be able to disable/enable the pattern introduced in #72105. This patch proposes one such mechanism. While this should solve the problem that we are facing today, it's understood to be a temporary workaround. It should be removed once support for lowering `vector.shape_cast` to SPIR-V is added. Also, (once implemented) the following proposal might make this workaround redundant: * https://discourse.llvm.org/t/improving-handling-of-unit-dimensions-in-the-vector-dialect/
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Brad Smith authored
The minimum GCC version was bumped from 7.1 to 7.4 so garbage collect the 7.2 workarounds. https://reviews.llvm.org/D156286
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Benjamin Kramer authored
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Benjamin Kramer authored
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Thomas Schenker authored
Before this PR, readability-container-contains fix-its did not handle integer literal suffixes correctly. It e.g. changed ``` MyMap.count(2) != 0U; ``` into ``` MyMap.contains(2)U; ``` With this PR, it correctly changes it to ``` MyMap.contains(2); ```
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DonatNagyE authored
This commit extends the class `SValBuilder` with the methods `getMinValue()` and `getMaxValue()` to that work like `SValBuilder::getKnownValue()` but return the minimal/maximal possible value the `SVal` is not perfectly constrained. This extension of the ConstraintManager API is discussed at: https://discourse.llvm.org/t/expose-the-inferred-range-information-in-warning-messages/75192 As a simple proof-of-concept application of this new API, this commit extends a message from `core.BitwiseShift` with some range information that reports the assumptions of the analyzer. My main motivation for adding these methods is that I'll also want to use them in `ArrayBoundCheckerV2` to make the error messages less awkward, but I'm starting with this simpler and less important usecase because I want to avoid merge conflicts with my other commit https://github.com/llvm/llvm-project/pull/72107 which is currently under review. The testcase `too_large_right_operand_compound()` shows a situation where querying the range information does not work (and the extra information is not added to the error message). This also affects the debug utility `clang_analyzer_value()`, so the problem isn't in the fresh code. I'll do some investigations to resolve this, but I think that this commit is a step forward even with this limitation.
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Momchil Velikov authored
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Nick Desaulniers authored
In commit b0533598 ("[X86InstrInfo] support memfold on spillable inline asm (#70832)"), I had a last minute fix to update the memoperands. I originally did this in the parent foldInlineAsmMemOperand call, updated the mir test via update_mir_test_checks.py, but then decided to move it to the child call of foldInlineAsmMemOperand. But I forgot to rerun update_mir_test_checks.py. That last minute change caused the same memoperand to be added twice when recursion occurred (for tied operands). I happened to get lucky that trailing content omitted from the CHECK line doesn't result in test failure. But rerunning update_mir_test_checks.py on the mir test added in that commit produces updated output. This is resulting in updates to the test that: 1. conflate additions to the test in child commits with simply updating the test as it should have been when first committed. 2. look wrong because the same memoperand is specified twice (we don't deduplicate memoperands when added). Example: INLINEASM ... :: (load (s32) from %stack.0) (load (s32) from %stack.0) Fix the bug, so that in child commits, we don't have additional unrelated test changes (which would be wrong anyways) from simply running update_mir_test_checks.py. Link: #20571
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Da-Viper authored
Fixes #41439 The documentation is update to say it is allowed to have omitted parameter names if the variable is not used
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Ulrich Weigand authored
Most addresses in SystemZ instructions take two registers, an index register and a base register. However, either of those can be omitted. If there is just a single register, this usually is taken as the base register - however, there are certain rare cases where you specifically want to use an index register but no base register. This is currently not handled consistently by the assembler / disassembler. Fix this by - always emitting a dummy 0 as base register for index- only addresses - correctly handle dummy 0 as indicating no base register when parsing an address This is compatible with current GNU binutils behavior.
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Ulrich Weigand authored
The __builtin_s390_vceq* family of builtins currently take signed arguments with clang, but unsigned with GCC. Update clang to match existing GCC precendent.
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- Dec 04, 2023
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Ulrich Weigand authored
The builtins that expand to the vlrl/vlrlr and vstrl/vstrlr instructions are currently named inconsistently between GCC and clang. Rename the clang versions to match GCC.
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Ulrich Weigand authored
Clang currently implements a set of vector rotate builtins (__builtin_s390_verll*) in terms of platform-specific LLVM intrinsics. To simplify the IR (and allow for common code optimizations if applicable), this patch removes those LLVM intrinsics and implements the builtins in terms of the platform-independent funnel shift intrinsics instead. Also, fix the prototype of the __builtin_s390_verll* builtins for full compatibility with GCC.
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Guray Ozen authored
This PR introduce `nvvm.fence.proxy` OP for the following cases: ``` nvvm.fence.proxy { kind = #nvvm.proxy_kind<alias>} nvvm.fence.proxy { kind = #nvvm.proxy_kind<async>} nvvm.fence.proxy { kind = #nvvm.proxy_kind<async.global>} nvvm.fence.proxy { kind = #nvvm.proxy_kind<async.shared>, space = #nvvm.shared_space<cta>} nvvm.fence.proxy { kind = #nvvm.proxy_kind<async.shared>, space = #nvvm.shared_space<cluster>} ``` -
Guray Ozen authored
GPU dialect has `#gpu.address_space<workgroup>` for shared memory of NVGPU (address space =3). Howeverm when IR combine NVGPU and GPU dialect, `nvgpu-to-nvvm` pass fails due to missing attribute conversion. This PR adds `populateGpuMemorySpaceAttributeConversions` to nvgou-to-nvvm lowering, so we can use `#gpu.address_space<workgroup>` `nvgpu-to-nvvm` pass
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Ulrich Weigand authored
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Florian Hahn authored
MinBWs contains entries that specify the minimum required bitwidth. In some cases, the old and new bitwidths can be equal (see test case) and in those cases no truncations are needed, so skip those cases. Fixes #74307.
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Nikita Popov authored
We can use Intrinsic::getDeclaration() here, we just have to pass the correct arguments. This function accepts only the mangled types, not all argument types.
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Tom Eccles authored
Enable by default for optimization levels higher than 0 (same behavior as clang). For simplicity, only forward the flag to the frontend driver when it contradicts what is implied by the optimization level. This was first landed in https://github.com/llvm/llvm-project/pull/73111 but was later reverted due to a performance regression. That regression was fixed by https://github.com/llvm/llvm-project/pull/74065.
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Louis Dionne authored
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Louis Dionne authored
In preparation for running clang-format on the whole code base, we are also removing mentions of the legacy _LIBCPP_INLINE_VISIBILITY macro in favor of the newer _LIBCPP_HIDE_FROM_ABI. We're still leaving the definition of _LIBCPP_INLINE_VISIBILITY to avoid creating needless breakage in case some older patches are checked-in with mentions of the old macro. After we branch for LLVM 18, we can do another pass to clean up remaining uses of the macro that might have gotten introduced by mistake (if any) and remove the macro itself at the same time. This is just a minor convenience to smooth out the transition as much as possible. See https://discourse.llvm.org/t/rfc-clang-formatting-all-of-libc-once-and-for-all for the clang-format proposal.
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Simon Pilgrim authored
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paperchalice authored
Fix ppc build bot
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Justin Wilson authored
This PR introduces DIGlobalVariableAttr and DIGlobalVariableExpressionAttr so that ModuleTranslation can emit the required metadata needed for debug information about global variable. The translator implementation for debug metadata needed to be refactored in order to allow translation of nodes based on MDNode (DIGlobalVariableExpressionAttr and DIExpression) in addition to DINode-based nodes. A DIGlobalVariableExpressionAttr can now be passed to the GlobalOp operation directly and ModuleTranslation will create the respective DIGlobalVariable and DIGlobalVariableExpression nodes. The compile unit that DIGlobalVariable is expected to be configured with will be updated with the created DIGlobalVariableExpression.
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Nikita Popov authored
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LLVM GN Syncbot authored
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Nicolas van Kempen authored
Make a modernize version of abseil-string-find-startswith using the available C++20 `std::string::starts_with` and `std::string_view::starts_with`. Following up from https://github.com/llvm/llvm-project/pull/72283.
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Ivan Kosarev authored
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Krzysztof Parzyszek authored
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Vlad Serebrennikov authored
This patch continues the work started with ea5b1ef0. See that commit and its corresponding PR for details.
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agozillon authored
This patch changes the bounds generation code shared between OpenMP and OpenACC to always attach an extent to the bounds generation. This is currently required for OpenMP descriptor lowering but may not necessarily be required in the case of OpenACC.
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paperchalice authored
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Florian Hahn authored
Split off live-in printing to VPlan::printLiveIns and use it to print Live-ins when printing in the DOT format.
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