This one is unneeded after commit d60ef933 (2023-02-03).

Section names used in ELF linker scripts can be quoted, but such
quotes must not be propagated to the binary ELF section names.  As
such strip the quotes from the section names when processing them, and
also strip them from linker script functions that take section names
as parameters.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D124266

Here's a high level summary of the changes in this patch. For more
information on rational, see the RFC.
(https://discourse.llvm.org/t/rfc-a-unified-lto-bitcode-frontend/61774).

  - Add config parameter to LTO backend, specifying which LTO mode is
    desired when using unified LTO.
  - Add unified LTO flag to the summary index for efficiency. Unified
    LTO modules can be detected without parsing the module.
  - Make sure that the ModuleID is generated by incorporating more types
    of symbols.

Differential Revision: https://reviews.llvm.org/D123803

This reverts commit a32d14fd.

Causes crashes, see https://reviews.llvm.org/rGa32d14fd4c0a43c154f251df1ccfe57e8b0a711a.

- add the `from_range_t` constructors and the related deduction guides;
- add the `insert_range`/`assign_range`/etc. member functions.

(Note: this patch is split from https://reviews.llvm.org/D142335)

Differential Revision: https://reviews.llvm.org/D149832

Reviewed By: #libc, ldionne

Spies: ldionne, libcxx-commits

Differential Revision: https://reviews.llvm.org/D154381

Adding assertions will aid users that have bugs in their code to
receive better error messages.

Differential Revision: https://reviews.llvm.org/D154425

The library expansion has too many paths for all the permutations of
DAZ, unsafe and the 3 exp functions. It's easier to expand it in the
backend when we know all of these things. The library currently misses
the no-infinity check on the overflow, which this handles optimizing
out.

Some of the <3 x half> fast tests regress due to vector widening
dropping flags which will be fixed separately.

Apparently there is no exp10 intrinsic, but there should be. Adds some
deadish code in preparation for adding one while I'm following along
with the current library expansion.

Previously this did a fast math expansion only.

Summary:
Reviewer requested that this routine not be a macro, however that means
that it was not being intitialized as the static initializer was done
before the memcpy from the device. Fix this so we can get timing
information.

This fixes a fallout from 5b77e752.

Differential Revision: https://reviews.llvm.org/D154388

A year ago when I was not invested at all into compilers, I found an assertion error when building an AArch64 debug build with LTO + CFI, among other combinations.

It was posted as a github issue here: https://github.com/llvm/llvm-project/issues/54088

I took it upon myself to revisit the issue now that I have spent some more time working on LLVM.

Reviewed By: MatzeB

Differential Revision: https://reviews.llvm.org/D151276

This reverts commit eda47fdd.

It failed on NVidia, AMD and Windows bots. Investigating.

Summary:
I forgot to add the `defined()` check on NVPTX.

These inherited the fast math checks from f32, but the manual suggests
these should be accurate enough for unconditional use. The definition
of correctly rounded is 0.5ulp, but the manual says "0.51ulp". I've
been a bit nervous about changing this as the OpenCL conformance test
does not cover half. Brute force produces identical values compared to
a reference host implementation for all values.

Probably should merge the DAG and gisel tests.

for when an alignment attribute is used. This will be useful for D147184 to demonstrate what changes.

The SDAG will sometimes insert an extend between
the shift and an and (immediate) even though the
immediate is narrower than the narrow size.
This does not allow us to produce a rotate
instruction (such as rlwinm).
This patch just adds a combine to move the extend
onto the and.

Differential revision: https://reviews.llvm.org/D152911

This refactor helps us identify which steps need FLLock so that we can
reduce the holding time of FLLock in SizeClassAllocator64.

Also move the data members to the end of class to align the style in
SizeClassAllocator32.

Reviewed By: cferris

Differential Revision: https://reviews.llvm.org/D152596

Some Fuchsia zx tests failed from https://reviews.llvm.org/D153888:
https://turquoise-internal-review.git.corp.google.com/c/integration/+/729619

Use `ReservedMemoryDefault` for `SCUDO_FUCHSIA` to use the default
MemMap API, while test failures are debugged.

Differential Revision: https://reviews.llvm.org/D154538

This change continues with the line of work discussed in https://discourse.llvm.org/t/riscv-transition-in-vector-pseudo-structure-policy-variants/71295.

This change targets all the pseudos used in loads (unit, strided, segmented, fault first, and their combinations). As with previous changes in the series, we replace the existing TA and TU forms with a single unified pseudo with a passthru (which may be implicit_def) and a policy operand.

One quirk is that I went ahead and treated the unmasked mask load instruction (vlm) the same way. We need the pass thru operand to model tail undefined, but since the instruction is unconditionally agnostic and the instruction has no mask, the policy operand is arguably unneeded. I kept it mostly for consistency sake.

Another quirk worth highlighting is that segment loads require a bit of dedicated handling. Surprisingly, we don't have IMPLICIT_DEF nodes of the right types, and attempting to use them results in some odd looking codegen and a few crashes. Instead, I left the REG_SEQUENCE form, and extended InsertVSETVLI to recognize the complex undefs. Arguably, we should probably revisit the handling of undef reg_sequence nodes here, but I'm hoping to side step that in this patch.

As before, we see codegen changes (some improvements and some regressions) due to scheduling differences caused by the extra implicit_def instructions. I did have to delete one register allocation regression test as I couldn't figure out how to meaningfully update it. I spent a significant amount of time trying, and finally gave up.

Differential Revision: https://reviews.llvm.org/D154141

pth.h hasn't been used since we removed support for PTH in
0a6b5b65

Existing Linalg passes are still anchoring on FuncOp.
Relax this unnecessary limitation.

Differential Revision: https://reviews.llvm.org/D154497

We're seeing a lot of test failures on the lldb incremental x86 CI bot
since I landed https://reviews.llvm.org/D139453 - revert it while I
investigate.

This reverts commit 624813a4.

The instrument comment specified a different LMUL than the vsetvli
above it. This patch syncs the LMUL comment and the vsetvli.

Differential Revision: https://reviews.llvm.org/D154525

Previously we expanded these in a fast-math way and the device
libraries were relying on this behavior. The libraries have a pending
change to switch to the new target intrinsic.

Unlike the library version, this takes advantage of no-infinities on
the result overflow check.

This patch adds the necessary support to provide timing information in
`libc` tests. This is useful for determining which tests look what
amount of time. We also can use this as a test basis for providing more
fine-grained timing when implementing things on the GPU.

The main difficulty with this is the fact that the AMDGPU fixed
frequency clock operates at an unknown frequency. We need to read this
on a per-card basis from the driver and then copy it in. NVPTX on the
other hand has a fixed clock at a resolution of 1ns. I have also
increased the resolution of the print-outs as the majority of these are
below a millisecond for me.

Reviewed By: JonChesterfield

Differential Revision: https://reviews.llvm.org/D154446

Missing a `withConst`, so when deducing from a string literal, a `const` is erroneously added to the deduced type.

Reviewed By: ychen

Differential Revision: https://reviews.llvm.org/D154301

Update generateInstruction to return the produced value instead of
setting it for each opcode. This reduces the amount of duplicated code
and is a preparation for D153696.

Reviewed By: Ayal

Differential Revision: https://reviews.llvm.org/D154240

Looks like the output changed after rebasing

This patch implements HLFIR lowering for associating an actual
TARGET argument to a dummy POINTER argument.

Reviewed By: tblah, jeanPerier

Differential Revision: https://reviews.llvm.org/D154311

Following up the 'add' named op, here are the remaining basic arithmetic
and maths, including a 'div_unsigned' for integer unsigned values. In the
same pattern as 'matmul_unsigned', the simply named 'div' assumes signed
values and the '_unsigned' variation handles the unsigned values.

It's a bit odd, but there doesn't seem to be a easy way to restrict to
specific types to make 'div_unsigned' only work with integers in the
structured ops framework.

Same as 'add', these have strict semantics regarding casts.

Unary math ops will need some massaging, so I split these ones for now
as I continue working on them.

Differential Revision: https://reviews.llvm.org/D154524

Fix incorrect uses of formatv specifiers in LLDB_LOG. Unlike Python,
arguments must be numbered. All the affected log statements take
llvm:Errors so use the LLDB_LOG_ERROR macro instead.

Differential revision: https://reviews.llvm.org/D154532

Fix incorrect uses of LLDB_LOG_ERROR. The macro doesn't automatically
inject the error in the log message: it merely passes the error as the
first argument to formatv and therefore must be referenced with {0}.

Thanks to Nicholas Allegra for collecting a list of places where the
macro was misused.

rdar://111581655

Differential revision: https://reviews.llvm.org/D154530

We add usage, build instructions and examples illustrating how clang-repl works.

Differential revision: https://reviews.llvm.org/D152109

Following from D153864, this patch implements the lowerDeinterleaveIntrinsic
hook to lower deinterleaves of loads into vlseg2 intrinsics.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D153876

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D153875