Depends on D156122

Differential Revision: https://reviews.llvm.org/D156123

Differential Revision: https://reviews.llvm.org/D156122

For G_ABS with type v2s16 and sgpr inputs break down into two s32 G_ABS
instructions.

Patch by: Acim Maravic

Differential Revision: https://reviews.llvm.org/D155867

There is no need to increase the size of odd sized vectors if they are
going to be scalarized by a different rule.

Patch by: Acim Maravic

Differential Revision: https://reviews.llvm.org/D155865

Differential Revision: https://reviews.llvm.org/D156739

Differential Revision: https://reviews.llvm.org/D156736

Since we no longer support typed LLVM IR pointer types, the code can
be simplified into for example using PointerType::get directly instead
of using Type::getInt8PtrTy and Type::getInt32PtrTy etc.

Differential Revision: https://reviews.llvm.org/D156733

Added a series of optimization to the Subtract & Union function of PresburgerRelation, referring to the ISL implementation.
Add isPlainEqual to Subtract & union,also some basic check to union.
Tested it on a simple Benchmark implemented by myself to see that it can speed up the Subtract operation and Union operation, also decrease the result size.

The Benchmark can be found here: [[ https://github.com/gilsaia/llvm-project-test-fpl/blob/develop_benchmark/mlir/benchmark/presburger/Benchmark.cpp | benchmark]]

The overall results for Union & Subtract are as follows (previous benchmark has a bug,after fix that,the figure below is new)
{F28455229}

The results for each case are as follows
{F28455234}
{F28455239}

{F28455245}
{F28455246}

Reviewed By: Groverkss

Differential Revision: https://reviews.llvm.org/D156241

This work introduces `MLIR_CUDA_DEBUG` environment value and `debug_print` function to be able to debug runtimes.

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D156232

Differential Revision: https://reviews.llvm.org/D156228

Fixes https://github.com/llvm/llvm-project/issues/57504.

Differential Revision: https://reviews.llvm.org/D138263

This was an omission in the spec that has now been addressed
https://github.com/riscv/riscv-code-size-reduction/pull/224.

Differential Revision: https://reviews.llvm.org/D156314

This change follows from https://reviews.llvm.org/D156416 We include
`llvm-remark-size-diff` as a part of `llvm-remarkutil` under a
subcommand `size-diff`.

Differential Revision: https://reviews.llvm.org/D156515

This reverts commit 3b34d69a.

As noted in <https://github.com/llvm/llvm-project/issues/64090>, it's
more efficient to lower a partword 'atomicrmw xchg a, 0` to and amoand
with appropriate mask. There are a range of possible ways to go about
this - e.g. writing a combine based on the
`llvm.riscv.masked.atomicrmw.xchg` intrinsic, or introducing a new
interface to AtomicExpandPass to allow target-specific atomics
conversions, or trying to lift the conversion into AtomicExpandPass
itself based on querying some target hook. Ultimately I've gone with
what appears to be the simplest approach - just covering this case in
emitMaskedAtomicRMWIntrinsic. I perhaps should have given that hook a
different name way back when it was introduced.

This also handles the `atomicrmw xchg a, -1` case suggested by Craig
during review.

Fixes https://github.com/llvm/llvm-project/issues/64090

Differential Revision: https://reviews.llvm.org/D156801

Differential Revision: https://reviews.llvm.org/D155581

Add a method to the CallOpInterface to get a mutable operand range over
the function arguments.  This allows to add, remove, or change the type
of call arguments in a generic manner without having to assume that the
argument operand range is at the end of the operand list, or having to
type switch on all supported concrete operation kinds.

Alternatively, a new OpInterface could be added which inherits from
CallOpInterface and appends it with the mutable variants of the base
interface.

There will be two users of this new function in the beginning:
(1) A few passes in the Arc dialect in CIRCT already use a downstream
implementation of the alternative case mentioned above: https://github.com/llvm/circt/blob/main/include/circt/Dialect/Arc/ArcInterfaces.td#L15
(2) The BufferDeallocation pass will be modified to be able to pass
ownership of memrefs to called private functions if the caller does not
need the memref anymore by appending the function argument list with a
boolean value per memref, thus enabling earlier deallocation of the
memref which can lead to lower peak memory usage.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D156675

GFX9 subtargets from GFX90A onwards lack GDS but still have GWS.

Differential Revision: https://reviews.llvm.org/D156713

MachineVerifier does not check that DBG_VALUE, DBG_VALUE_LIST and
DBG_INSTR_REF have the expected number of operands, so printing them
(e.g. with -print-after-all) should not crash.

Differential Revision: https://reviews.llvm.org/D156226

This revision removes the createIndexConstant method, which implicitly creates constants of the
getIndexType type and updates all uses to the more explicit createIndexAttrConstant which requires
an explicit Type parameter.

This is an NFC step towards entangling index type conversion in LLVM lowering.

The selection of which index type to use requires finer granularity than the existing
implementations which all rely on pass level flags and end up in mismatches, especially on GPUs
with multiple address spaces of different capacities.

This revision also includes an NFC fix to MemRefToLLVM.cpp that prevents a crash in cases where
an integer memory space cannot be derived for a MemRef.

Differential Revision: https://reviews.llvm.org/D156854

The last use was removed by:

  commit 1b123204
  Author: Alexandros Lamprineas <alexandros.lamprineas@arm.com>
  Date:   Thu May 11 13:44:40 2023 +0100

There was some duplication between these tests and
we can merge them by checking __riscv_xlen for the parts
that aren't duplicated.

Reviewed By: kito-cheng

Differential Revision: https://reviews.llvm.org/D156851

This is a reduced test case originally meant to be addressed by
https://reviews.llvm.org/D137787. It was recently fixed by commit
61c7a914 ("Commit to a primary definition for a class when we load
its first member."), noting the difficulty to come up with a reduced
test case. This setup with four modules seems to fail consistently
before the fix mentioned above with an assertion in CGExprCXX.cpp,
CodeGenFunction::EmitCXXDestructorCall():
Assertion `ThisTy->getAsCXXRecordDecl() == DtorDecl->getParent() &&
"Pointer/Object mixup"' failed.

Differential Revision: https://reviews.llvm.org/D156806

This reverts commit 0b1d1cdb. It causes a clang crash. Details will be posted to D153638.

Issue mentioned: https://github.com/riscv/riscv-code-size-reduction/issues/182

The order of callee-saved registers stored by Zcmp push in memory is reversed.

Pseudo code for cm.push in https://github.com/riscv/riscv-code-size-reduction/releases/download/v1.0.4-1/Zc.1.0.4-1.pdf

```
if (XLEN==32) bytes=4; else bytes=8;

addr=sp-bytes;
for(i in 27,26,25,24,23,22,21,20,19,18,9,8,1)  {
  //if register i is in xreg_list
  if (xreg_list[i]) {
    switch(bytes) {
      4:  asm("sw x[i], 0(addr)");
      8:  asm("sd x[i], 0(addr)");
    }
    addr-=bytes;
  }
}
```

The placement order for push is s11, s10, ..., ra.

CFI offset should be calculed as reversed order for correct stack unwinding.

Reviewed By: fakepaper56, kito-cheng

Differential Revision: https://reviews.llvm.org/D156437

Add basic TLS support for ppc64. Only global-dynamic model is supported.

Reviewed By: lhames

Differential Revision: https://reviews.llvm.org/D155926

This commit adds support for arith.extf in the supported list of
elementwise ops for subgroup MMA ops, and enables lowering to
SPIR-V.

Reviewed By: mravishankar

Differential Revision: https://reviews.llvm.org/D156847

UnaryOperator(&)'s creation might need layout of some records
whose fields importation are still on fly, the layout is incorrectly
computed and cached. Clients relying on this will not work properly
or crash direclty (e.g StaticAnalyzer's MemRegion.cpp (calculateOffset)).

Use UnaryOperator::CreateEmpty() instead of UnaryOperator::Create()
to avoid this computation.

Fixes https://github.com/llvm/llvm-project/issues/64170

Reviewed By: aaron.ballman, balazske, shafik

Differential Revision: https://reviews.llvm.org/D156201

For friend class template within dependent context:

1. Should not do structure matching checking. This fixes importing failure of
   template with non-type parm;
2. Should not be added into redecls chain.

See Sema::CheckClassTemplate().

Fixes https://github.com/llvm/llvm-project/issues/64169.

Reviewed By: aaron.ballman, balazske, shafik

Differential Revision: https://reviews.llvm.org/D155661

This fixes issue 64080. tlbilx exists in ISA 2.07 Book III-E. Since
contents of Book III-E were eliminated after ISA 3.0, tlbilx does not
exist in ISA 3.0 and ISA 3.1.

Reviewed By: nickdesaulniers

Differential Revision: https://reviews.llvm.org/D156204

Reuse isSVESizelessBuiltinType() and isRVVSizelessBuiltinType().

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D156686

Since jitlink for ppc64le is ready for general use, test cases in compiler-rt for ELFNixPlatform support can be enabled.

Reviewed By: lhames

Differential Revision: https://reviews.llvm.org/D156399

PC-relative instructions are added in ISA-3.1 implemented by pwr10. This patch adds basic pc-relative relocation.

Reviewed By: lhames

Differential Revision: https://reviews.llvm.org/D155771

https://clang.llvm.org/docs/AutomaticReferenceCounting.html#arc-runtime-objc-retain

rdar://79869679

Differential revision: https://reviews.llvm.org/D105671

Remove --unwindlib=none flag that was added by D143598. It is required
to not pass this flag when linking binaries. With this flag, linking
e.g. llvm-symbolizer will fail.

There was a missing dependency from most targets to the implicitly linked
libraries (libunwind and builtins), which was causing the build for those
targets to fail when they were built on their own. I never noticed this
because I always build the implicitly linked libraries together with
their dependencies. Make the dependency explicit by introducing a new
target //llvm/utils/gn/build/libs/implicit representing the platform's
implicitly linked libraries, and depend on that from the LLVM libraries,
so that "normal" binaries like llvm-symbolizer will have all of their
dependencies available.

D143598 set the arch subdirectory to i686 for Android. However, the arch
subdirectory on Android is i386, and has been for a long time.

$ find android-ndk-r* -name i386
android-ndk-r18b/toolchains/llvm/prebuilt/linux-x86_64/lib64/clang/7.0.2/lib/linux/i386
android-ndk-r19/toolchains/llvm/prebuilt/linux-x86_64/lib64/clang/8.0.2/lib/linux/i386
android-ndk-r20/toolchains/llvm/prebuilt/linux-x86_64/lib64/clang/8.0.7/lib/linux/i386
android-ndk-r21-beta1/toolchains/llvm/prebuilt/linux-x86_64/lib64/clang/9.0.8/lib/linux/i386
android-ndk-r21d/toolchains/llvm/prebuilt/linux-x86_64/lib64/clang/9.0.8/lib/linux/i386
android-ndk-r22/toolchains/llvm/prebuilt/linux-x86_64/lib64/clang/11.0.5/lib/linux/i386
android-ndk-r23-beta5/toolchains/llvm/prebuilt/linux-x86_64/lib64/clang/12.0.5/lib/linux/i386
android-ndk-r24/toolchains/llvm/prebuilt/linux-x86_64/lib64/clang/14.0.1/lib/linux/i386
android-ndk-r25c/toolchains/llvm/prebuilt/linux-x86_64/lib64/clang/14.0.7/lib/linux/i386

Using the wrong name prevents Clang from being able to find libunwind.a on
x86. Fix the code to use i386 as the arch subdirectory, consistent with
the NDK.

Bring back -Wl,-z,defs which was removed for Android by D143598, presumably
because of the missing unwind library.

Differential Revision: https://reviews.llvm.org/D146266

Removed some TODOs that are not likely to be done
or are already recorded through git tracker.

Reviewed By: Peiming

Differential Revision: https://reviews.llvm.org/D156836

Use the correct address space for alloca. Also use opaque pointers.

Fix the linting problems which causes `clang/utils/ci/run-buildbot check-format` to return 1.

Also make a correction for the email address of the author of
0fd41759:

  The correct email address is "ar.ashouri999@gmail.com", not "ar.ashouri999@google.com".

Reviewed by: ziqingluo-90 (Ziqing Luo)

Differential revision: https://reviews.llvm.org/D155814