- Feb 26, 2024
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Luke Lau authored
These shufflevector chains will get combined into a n-ary concat_vectors node.
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Orlando Cazalet-Hyams authored
llvm.dbg.labels are deleted in SpeculativelyExecuteBB so DPLabels should be too. Modify existing test to check this (NB I couldn't find a dedicated debug-info test that checks this behaviour).
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Luke Lau authored
If the vector type is a fixed vector type, we convert it to a container scalable vector type to compute its reg class. But we need to keep the old fixed type so we create a result node with the same type. This code path is currently dead so I haven't been able to create a test case for it. But I have an upcoming patch for insert_subvector lowering that will exercise this.
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CarolineConcatto authored
All assembly instructions that have an operand using sve_pred_enum and mistakenly use '#' in front of it would fail without an error message.
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David Spickett authored
No idea why but this is now passing (though if it randomly fails I won't be surprised). See https://github.com/llvm/llvm-project/issues/25034 for background on the original expected fail.
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Nikolas Klauser authored
They aren't ever used, so they can be removed.
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Diana Picus authored
I'm about to add more tests here (downstream for now). Change-Id: Ibd5edb398f544c90e6e8b5e49b1777a407f0594a
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David Spickett authored
On Windows the line has \r\n at the end.
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Timm Bäder authored
We do not necessarily prepare storage for the return value when we are returning a complex value.
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Michael Halkenhäuser authored
Since there's no `ompt_target_data_transfer_tofrom_device` (within ompt_target_data_op_t enum) or something other that conveys the meaning of inter-device data exchange we decided to indicate a Device-to-Device transfer by using: optype == ompt_target_data_transfer_from_device (=3) Hence, a device transfer may be identified e.g. by checking for: (optype == 3) && (src_device_num < omp_get_num_devices()) && (dest_device_num < omp_get_num_devices()) Fixes: #66478
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Benjamin Maxwell authored
`op` can be null here, in which case this should just return a null value back.
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Nathan Sidwell authored
Some CGRecordLowering functions either do not need the object or do not mutate it. Thus marking static or const as appropriate.
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Orlando Cazalet-Hyams authored
Enables conversion between llvm.dbg.label and DPLabel.
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Orlando Cazalet-Hyams authored
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Clement Courbet authored
This uses a more systematic approach for determining whcich `DeclRefExpr`s mutate the underlying object: Instead of using a few matchers, we walk up the AST until we find a parent that we can prove cannot change the underlying object. This allows us to handle most address taking and dereference, bindings to value and const& variables, and track constness of pointee (see changes in DeclRefExprUtilsTest.cpp). This allows supporting more patterns in `performance-unnecessary-copy-initialization`. Those two patterns are relatively common: ``` const auto e = (*vector_ptr)[i] ``` and ``` const auto e = vector_ptr->at(i); ``` In our codebase, we have around 25% additional findings from `performance-unnecessary-copy-initialization` with this change. I did not see any additional false positives.
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Timm Bäder authored
This is also what the current interpreter does and a couple of test cases expect that.
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Yeting Kuo authored
RISC-V implements vector lrint/llrint by vfcvt.x.f.v.
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Wang Pengcheng authored
This reduces some lines.
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Timm Bäder authored
Either LHS or RHS might be non-complex, but not both.
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Yingwei Zheng authored
[GVN] Drop nsw/nuw flags when replacing the result of a with.overflow intrinsic with a overflowing binary operator (#82935) Alive2: https://alive2.llvm.org/ce/z/gyL7mn Fixes https://github.com/llvm/llvm-project/issues/82884.
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NAKAMURA Takumi authored
- Introduce `createDecision(E)` for the root node of `VisitBin`. - Handle `mcdc::DecisionParameters` for each Decision method.
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Dominik Wójt authored
The deduced "-march=" option always started with aarch64, which is not a valid value. There was also no way to distinguish between armv8-r and armv8-a. After this commit, the deduced "-march=" option will start with greatest available "armv*-a" value or "armv8-r".
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Aiden Grossman authored
This patch removes the exegesis:: prefix within the exegesis namespace in llvm-exegesis.cpp as it isn't necessary due to the code already being wrapped in the namespace.
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Timm Bäder authored
Implement constexpr checking for null pointers being passed to arguments annotated as nonnull.
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Jason Eckhardt authored
Currently the DecoderEmitter spends a fair amount of cycles performing repeated linear walks over the entire instruction list. This patch eliminates one such walk during HwMode collection for EncodingInfos. The eliminated traversal visits every instruction and then every EncodingInfos entry for that instruction merely to collect all referenced HwModes. That information already happens to be present in the HwModeSelects created during the one-time construction of CodeGenHwModes. We instead traverse the HwModeSelects, collecting each one referenced as an encoding select. This set is a small constant in size and does not generally grow with the size of the instruction set.
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Mehdi Amini authored
std::string was used here, likely by mistake. The usual convention for attributes is to use StringAttr.
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Matteo Franciolini authored
The patch enables roundtrip to textual file when running `--verifyRoundtrip`. The verification is successful if both textual and bytecode formats can roundtrip successfully.
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NAKAMURA Takumi authored
This is a preparation of incoming Clang changes (#82448) and just checks `TVIdx` is calculated correctly. NFC. `TVIdxBuilder` calculates deterministic Indices for each Condition Node. It is used for `clang` to emit `TestVector` indices (aka ID) and for `llvm-cov` to reconstruct `TestVectors`. This includes the unittest `CoverageMappingTest.TVIdxBuilder`. See also https://discourse.llvm.org/t/rfc-coverage-new-algorithm-and-file-format-for-mc-dc/76798
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hev authored
This commit updates the pattern matching logic for the `AddLike` predicate in `LoongArchInstrInfo.td` to use the `isBaseWithConstantOffset` function provided by `CurDAG`. This optimization aims to improve the efficiency of pattern matching by identifying cases where the operation can be represented as a base address plus a constant offset, which can lead to more efficient code generation.
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Kai Luo authored
This is useful when computing absdiff. Correctness prove: https://alive2.llvm.org/ce/z/eMbxps, https://alive2.llvm.org/ce/z/SNCWJe . --------- Co-authored-by:
Yingwei Zheng <dtcxzyw@qq.com>
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Mehdi Amini authored
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Mehdi Amini authored
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Mehdi Amini authored
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Mehdi Amini authored
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tw-ilson authored
Since ODS generates getters functions for SPIRV operations' attribute names, we replace instances of these hardcoded strings in the SPIR-V dialect's op parser/printer with function calls for consistency. Fixes https://github.com/llvm/llvm-project/issues/77627 --------- Co-authored-by:
Lei Zhang <antiagainst@gmail.com>
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Matteo Franciolini authored
This enables to correctly roundtrip the attribute to text or bytecode.
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Matteo Franciolini authored
When roundtripping to bytecode an unregistered operation name that does not contain any '.' separator, the bytecode writer will emit an op encoding without a proper opName. In this case, the string just becomes a possibly unknown dialect name. At parsing, this dialect name is used as a proper operation name. However, when the unregistered operation name coincidentally matches that of a dialect, the parser would fail. That means we can't roundtrip an unregistered op with a name that matches one of the registered dialect names. For example, ``` "index"() : () -> () ``` can be emitted but cannot be parsed, because its name is coincidentally the same as that of the Index dialect. The patch removes such inconsistency. This patch specifically fixes the bytecode roundtrip of `mlir/test/IR/parser.mlir`.
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Owen Pan authored
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David CARLIER authored
This reverts commit 691b12a2.
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Yingwei Zheng authored
This patch extends `reassociateMinMaxWithConstants` to fold the following patterns: ``` umax (smax X, nneg C0), nneg C1 --> smax X, (umax C0, C1) smin (umin X, nneg C0), nneg C1 --> umin X, (smin/umin C0, C1) ``` Alive2: https://alive2.llvm.org/ce/z/wfEj-e Address the comment https://github.com/llvm/llvm-project/pull/82472#pullrequestreview-1896922897.
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