This changs the way the assembly matcher works for Aarch32 parsing.
Previously there was a pile of hacks which dictated whether the CC,
CCOut, and VCC operands should be present which de-facto chose if the
wide/narrow (or thumb1/thumb2/arm) instruction version were chosen.

This meant much of the TableGen machinery present for the assembly
matching was effectively being bypassed and worked around.

This patch makes the CC and CCOut operands optional which allows the ASM
matcher operate as it was designed and means we can avoid doing some of
the hacks done previously. This also adds the option for the target to
allow the prioritizing the smaller instruction encodings as is required
for Aarch32.

This patch fixes problems that pop up when clang emits DbgRecords
instead of debug intrinsics.

Note: this doesn't mean clang is emitting DbgRecords yet, because the
modules it creates are still always in the old debug mode. That will
come in a future patch.

Depends on #84739

This PR:
* adds Lifetime intrinsics/instructions
* fixes how the binary header is emitted (correct version and better
approximation of Bound)
* add validation into more test cases

In commit
https://github.com/llvm/llvm-project/commit/2b582440c16c72b6b021ea5c212ceda3bdfb2b9b,
we canonicalize the isInf/isNanOrInf idiom into fabs+fcmp for better
analysis/codegen (See also the discussion in
https://github.com/llvm/llvm-project/pull/76338).

This patch reverses the fabs+fcmp to `is.fpclass`. If the `is.fpclass`
is not supported by the target, it will be expanded by TLI.

Fixes the regression introduced by
https://github.com/llvm/llvm-project/commit/2b582440c16c72b6b021ea5c212ceda3bdfb2b9b
and
https://github.com/llvm/llvm-project/pull/80414#issuecomment-1936374206.

These includes were removed in 426e6945

This reverts commit 9b98692e.

This reverts commit 6f60ad7e.

Buildbots: https://lab.llvm.org/buildbot/#/builders/196/builds/47206

This reverts commit b097b3dc.

Buildbots: https://lab.llvm.org/buildbot/#/builders/196/builds/47206

This patch fixes problems that pop up when clang emits DbgRecords
instead of debug intrinsics.

Note: this doesn't mean clang is emitting DbgRecords yet, because the
modules it creates are still always in the old debug mode. That will
come in a future patch.

Depends on #84739

One more step in extending support for delayed privatization. This diff
adds support for scalar allocatables and pointers.

For each call that changes the streaming-mode ISel inserts a
COALESCER_BARRIER node for the FP and (non-scalable) vector arguments to
the callee.

When calling a non-streaming function from a streaming-compatible
function, it's not required to have +sme (in case the SME code-path is
not actually executed at runtime). The patterns to match the
COALESCER_BARRIER however were still predicated with `HasSME`, which is
incorrect. This patch tries to fix that.

Follow-up from https://github.com/llvm/llvm-project/pull/85604, this
change also fixes the ArithDialect target.

This option means that in assembly matching instructions with smaller
encodings will be preferred.

This will be used for the ARM instruction set where this is the correct
behavior after some other refactoring.

This fixes tied operand resolution in cases where there are optional operands before the tied operand.

Emits `2.0e+00f` instead of `(float)2.0e+00`.

This helps consumers of the emitted code, especially when there are
large numbers of floating point literals, to have a simple AST.

SinkCandidate is a VPSingleDefRecipe now, so no cast is needed to access
getUnderlyingInstr directly.

Adds a separate target for bufferization interfaces.

`//mlir:ArithDialect` would need to depend on
`//mlir:ValueBoundsOpInterface` as well, but that's creating a circular
dependency.

This change allows us to use `--lto-partitions` in some cases (not at
all guaranteed it works perfectly), as LDS is lowered before the module
is split for parallel codegen.

We must run LowerLDS before splitting modules as it needs to see all
callers of functions with LDS to properly lower them.

This commit changes MLIR's SROA implementation back from being pattern
based into a full pass. This is beneficial for upcoming changes that
rely more heavily on the datalayout.

Unfortunately, this change required substantial test changes, as the
IRBuilder no cleans up the IR.

This commit changes MLIR's Mem2Reg implementation back from being
pattern based into a full pass. Using Mem2Reg as a pattern is
wasteful, as each application can invalidate the dominance info.
Applying changes in bulk allows for reuse of the same dominance info.

Unfortunately, this requires some test changes, due to the `IRBuilder`
not simplifying IR.

We can simplify the implementation of the two range overload of `equal`
a bit since we can now use `if constexpr`.

[libc++][NFC] Merge is{,_nothrow,_trivially}{,_copy,_move,_default}{_assignable,_constructible} (#85308)

These headers have become very small by using compiler builtins, often
containing only two declarations. This merges these headers, since
there doesn't seem to be much of a benefit keeping them separate.

Specifically, `is_{,_nothrow,_trivially}{assignable,constructible}` are
kept and the `copy`, `move` and `default` versions of these type traits
are moved in to the respective headers.

rldimi is 64-bit instruction, so the corresponding builtin should not
be available in 32-bit mode. Rotate amount should be in range and
cases when mask is zero needs special handling.

This change also swaps the first and second operands of rldimi/rlwimi
to match previous behavior. For masks not ending at bit 63-SH,
rotation will be inserted before rldimi.

As part of the WebAssembly support work review
  https://github.com/llvm/llvm-project/pull/82588

It was decided to rename:

  Files: LVElfReader.cpp[h] -> LVDWARFReader.cpp[h]
         ELFReaderTest.cpp  -> DWARFReaderTest.cpp

  Class: LVELFReader        -> LVDWARFReader

The name LVDWARFReader would match the another reader LVCodeViewReader
as they will reflect the type of
debug information format that they are parsing.

As part of the WebAssembly support work
https://github.com/llvm/llvm-project/pull/82588

As the object files used in the test cases are a single object (just
produced by clang without being processed by wasm-ld), it was determined
to use .o intead of .wasm.

Update the README.txt to reflect that the tool now supports WebAssembly.

[GlobalISel] Implement convergence control tokens and intrinsics in GMIR

In the IR translator, convert the LLVM token type to LLT::token(), which is an
alias for the s0 type. These show up as implicit uses on convergent operations.

Differential Revision: https://reviews.llvm.org/D158147

See https://github.com/llvm/llvm-project/pull/85470#discussion_r1527297517

[AArch64][GlobalISel] Avoid splitting loads of large vector types into individual element loads (#85042)

This patch fixes an issue with the legalization of G_LOAD where the
presence of .lowerIfMemSizeNotByteSizePow2 before .clampMaxNumElements
was causing issues for vectors which matched that condition.

Such vectors would be lowered into per-element loads instead of being
split up into 128-bit chunks.

This addresses a build error introduced by
5a75242b.