- Nov 03, 2022
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rkayaith authored
The pipeline string must now include the pass manager's anchor op. This makes the parse API properly roundtrip the printed form of a pass manager. Since this is already an API break, I also added an extra callback argument which is used for reporting errors. The old functionality of appending to an existing pass manager is available through `mlirOpPassManagerAddPipeline`. Reviewed By: mehdi_amini, ftynse Differential Revision: https://reviews.llvm.org/D136403
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rkayaith authored
Including the anchor op ensures that all pass manager settings are fully specified, and makes the string consistent with the printed form. Depends on D134622 Reviewed By: rriddle Differential Revision: https://reviews.llvm.org/D134623
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Jan Sjodin authored
Remove unused [this] capture in lambda.
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rkayaith authored
In D134622 the printed form of a pass manager is changed to include the name of the op that the pass manager is anchored on. This updates the `-pass-pipeline` argument format to include the anchor op as well, so that the printed form of a pipeline can be directly passed to `-pass-pipeline`. In most cases this requires updating `-pass-pipeline='pipeline'` to `-pass-pipeline='builtin.module(pipeline)'`. This also fixes an outdated assert that prevented running a `PassManager` anchored on `'any'`. Reviewed By: rriddle Differential Revision: https://reviews.llvm.org/D134900
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Jay Foad authored
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David Green authored
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LiDongjin authored
Check hasOneUser before user_back(). Differential Revision: https://reviews.llvm.org/D136227
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Nikita Popov authored
InstCombine does some basic store to load forwarding. One case it currently misses is the case where the store is actually a memset. This patch adds support for this case. This is a minimal implementation that only handles a load at the memset base address, without an offset. GVN is already capable of performing this optimization. Having it in InstCombine can help with phase ordering issues, similar to the existing store to load forwarding. Differential Revision: https://reviews.llvm.org/D137323
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Nikita Popov authored
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zhijian authored
[XCOFF] change the decoding of External symbol's function auxiliary entry in XCOFF32 for llvm-readobj Summary: llvm-readobj decide whether to decode the external symbol's function auxiliary entry based on whether symbol is function or not currently. But the XCOFFSymbolRef::isFunction() do not work properly when -ffunction-sections is enabled. we will not decode the function auxiliary entry based on the XCOFFSymbolRef::isFunction() we will decode the function auxiliary entry based on following: According to the https://www.ibm.com/docs/en/aix/7.2?topic=formats-xcoff-object-file-format#XCOFF__c0f91ad419jbau In XCOFF32, there are only "one csect Auxiliary Entry" and "a function auxiliary symbol table entry" for the C_EXT, C_WEAKEXT, and C_HIDEXT Symbols. and By convention, the csect auxiliary entry in an XCOFF32 file must be the last auxiliary entry for any external symbol that has more than one auxiliary entry( that means for the C_EXT, C_WEAKEXT, and C_HIDEXT Symbols. if there more than one auxiliary Entries. we look the last one as csect auxiliary entry. and others auxiliary entries as function entries). Reviewers: Hubert Tong, James Henderson Differential Revision: https://reviews.llvm.org/D136950
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Nikita Popov authored
CVP currently only tries to simplify comparisons if there is a constant operand. However, even if both are non-constant, we may be able to determine the result of the comparison based on range information. IPSCCP is already capable of doing this, but because it runs very early, it may miss some cases. Differential Revision: https://reviews.llvm.org/D137253
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bipmis authored
This patch is to address the test cases in which the load has to be inserted at a right point. This happens when there is a store b/w the loads. This patch reverts the loads merge in all cases when stores are present b/w loads and will eventually be replaced with proper fix and test cases. Differential Revision: https://reviews.llvm.org/D137333
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Jan Sjodin authored
This patch moves the createOffloadEntriesAndInfoMetadata to OpenMPIRBuilder, the createOffloadEntry helper function. The clang specific error handling is invoked using a callback. This code will also be used by flang in the future.
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Aaron Ballman authored
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Nikita Popov authored
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Stefan Gränitz authored
This test caught my attention because it's the only one in JITLink that XFAILs. Running it in isolation showed that the output doesn't meet the CHECK-LINES, i.e. the block address didn't match: ``` error: CHECK-NEXT: expected string not found in input CHECK-NEXT: block 0xfff02000 size = 0x00000001, align = 16, alignment-offset = 0 <stdin>:22:2: note: possible intended match here block 0xfff01000 size = 0x00000001, align = 16, alignment-offset = 0 ``` Though, that doesn't appear to be the reason the test XFAILs. What we really want to check here is that llvm-jitlink doesn't fail with a duplicate section error yet. In order to avoid issues like this in the future we can match a placeholder to check for some valid address within the slab (64Kb == last 4 digits). The patch also drops the duplicate -noexec argument, removes an empty RUN-line, fixes indentation and adds a newline at EOF. Reviewed By: sunho Differential Revision: https://reviews.llvm.org/D137148 -
OCHyams authored
This reverts commit c285df77e9b78f971f9cd9d025248c20b030cc2a. A sanitizer bot found an issue: https://lab.llvm.org/buildbot/#/builders/5/builds/28809/steps/13/logs/stdio
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Michael Buch authored
On Linux the `std::function` behaved differently to that on Darwin. This patch removes usage of `std::function` in the test but attempts to retain the test-coverage. We mainly want function types appearing in the template argument and function argument lists. Also add a `char const*` overload to one of the test functions to cover the "format function argument using ValueObject formatter" code-path. Differential Revision: https://reviews.llvm.org/D137272
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Stefan Pintilie authored
A new register class as well as a number of related subregisters are being added to Future CPU. These registers are Dense Math Registers (DMR) and are 1024 bits long. These regsiters can also be used in consecutive pairs which leads to a register that is 2048 bits. This patch also adds 7 new instructions that use these registers. More instructions will be added in future patches. Reviewed By: amyk, saghir Differential Revision: https://reviews.llvm.org/D136366
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Nikita Popov authored
To allow reusing this in more places in SimplifyCFG.
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Haojian Wu authored
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Alexey Bataev authored
Need to use comma instead of + symbol to prevent writing after bounds.
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Alexey Bataev authored
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Aaron Ballman authored
[module.unit]p1 specifies that module and import are invalid components of a module name, that module names cannot contain reserved identifiers, and that std followed by zero or more digits is reserved. The first issue (module and import pseudo-keywords) requires a diagnostic, the second issue (use of reserved identifiers) does not require a diagnostic. We diagnose both the same -- the code is ill- formed unless the module declaration is in a system "header". This allows STL implementations to use the reserved module names while preventing users from stealing them out from under us. Differential Revision: https://reviews.llvm.org/D136953
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bipmis authored
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Corentin Jabot authored
Reviewed By: aaron.ballman Differential Revision: https://reviews.llvm.org/D137172
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Florian Hahn authored
Use existing ConstantInt::getTrue/getFalse functionality instead of custom getScalarConstOrSplat as suggested by @nikic.
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Mats Petersson authored
The earlier available datalyaout allows MLIR to LLVM-IR transformation to use the datalayout for decisions, such as comparing sizes for different types of integers. This should solve https://github.com/llvm/llvm-project/issues/57230 Reviewed By: awarzynski, vzakhari Differential Revision: https://reviews.llvm.org/D133568
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Yusuke Kadowaki authored
The documentation of the patch https://reviews.llvm.org/D132131 looks disorganized on the website https://clang.llvm.org/docs/ClangFormatStyleOptions.html. This patch tries to fix that. Differential Revision: https://reviews.llvm.org/D137075
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Björn Schäpers authored
They were annotated with TrailingAnnotation, which they are not. And that resulted in some quirky formatting in some cases. Differential Revision: https://reviews.llvm.org/D136635
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Björn Schäpers authored
Without the patch UnwrappedLineFormatter::analyzeSolutionSpace just ran out of possible formattings and would put everything just on one line. The problem was that the the line break was forbidden, but putting the conditional colon on the same line is also forbidden. Differential Revision: https://reviews.llvm.org/D135918
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OCHyams authored
The Assignment Tracking debug-info feature is outlined in this RFC: https://discourse.llvm.org/t/ rfc-assignment-tracking-a-better-way-of-specifying-variable-locations-in-ir Add the DIAssignID metadata attachment boilerplate. Includes a textual-bitcode roundtrip test and tests that the verifier and parser catch badly formed IR. This piece of metadata links together stores (used as an attachment) and the yet-to-be-added llvm.dbg.assign debug intrinsic (used as an operand). Reviewed By: jmorse Differential Revision: https://reviews.llvm.org/D132222
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Valery Pykhtin authored
The problem with GCNDownwardRPTracker::advanceBeforeNext is that it doesn't allow to get register pressure after the last instruction in a MBB. However when we track RP through the boundary of a MBB we need the state that is after the last instruction of the MBB and before the first instruction of the successor MBB. Currently we stop traking RP in the state 'at' the last instruction of the MBB which is incorrect. This patch fixes 27 lit tests with EXPENSIVE_CHECKS enabled. Reviewed By: rampitec, arsenm Differential Revision: https://reviews.llvm.org/D136927
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Tom Eccles authored
Only add the option processing and store the result. No attributes are added to FIR yet. This patch follows Clang in forwarding -fno-honor-infinities as -menable-no-infs. Reviewed By: kiranchandramohan awarzynski vzakhari Differential Revision: https://reviews.llvm.org/D137072
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Nikita Popov authored
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Simi Pallipurath authored
Cortex-A715 is an Armv9-A AArch64 CPU. This patch introduces support for Cortex-A715. Technical Reference Manual: https://developer.arm.com/documentation/101590/latest. Reviewed By: vhscampos Differential Revision: https://reviews.llvm.org/D136957
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Nikita Popov authored
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Nikita Popov authored
We currently only forward store -> load, but could do the same for memset as well.
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Nikita Popov authored
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Caroline Concatto authored
This patch is to solve this: https://lab.llvm.org/buildbot#builders/36/builds/26801 Created by this patch: a20112a7 [AArch64]SME2 instructions that use ZTO operand
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