Try out new github action for scala CI

* transform InlineBitExtractions

* InlineNotsTransform, InlineBitExtractionsTransform: inputForm/outputForm = UnknownForm

* clean up some minor redundancies from Adam review

* clarifications from Seldrige review

Co-authored-by: Jim Lawson <ucbjrl@berkeley.edu>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>

Change EliminateTargetPaths to remove ResolvePaths annotations in the
output AnnotationSeq. This prevents a bug whereby the upstream
ResolvePaths annotations from previous runs of EliminateTargetPaths
can result in unexpected duplication.

Adds a test that checks that ResolvePaths annotations are actually
removed.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>

* Change LoggerState.globalLevel to Warn
PR #1305 changes the `globalLogLevel` in `LogLevelAnnotation` to from `None` to `Warn`. Update the default `LoggerState.globalLevel` to `Warn` as well.

* Update LoggerSpec tests to match globalLogLevel of Warn

* Add test of behavior for LogLevel.None

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

Change PassTests to include Dedup when running transforms. This makes
PassTests behave more like an actual compiler.

Fixes bugs in Inline, Flatten, and Grouping tests where the tests
would only work without deduplication. This adds
NoCircuiDedupAnnotations to prevent deduplication for the offending
tests.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

Cleanup testing console

This includes the built-in functions in BackendCompilationUtilities
which are a public API

Cleanup verilog emitter casts

Many tools don't except 'always @(posedge 1'h0)' so we assign the
literal to a wire and use that as the posedge target.

[skip formal checks]

Adds new InlineCastsTransform to the VerilogEmitter which removes
Statements that do nothing but cast by inlining the cast Expression

Fetch and checkout the base branch before attempting to inspect the log

[skip formal checks]

* ConstProp FoldEqual/FoldNotEqual propagate boolean (non-)equality with true/false
* transform InlineNots
* transform back-to-back Nots into straight rename
* swap mux with inverted select

Co-authored-by: Jack Koenig <jack.koenig3@gmail.com>

This removes the incorrect short --firrtl-source option. This was
supposed to be the helpValueName.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>

Infer resets last connect semantics

* Move Map lookup into closure so it only occurs if necessary
* Replace gender with flow and improve code clarity

InferResets will now support last connect semantics (within the same
scope) when determining the concrete reset type for components of type
Reset. This only includes *unconditional* last connects; it remains
illegal to drive a component of type Reset with different concrete types
under differing when conditions.

For example, the following is now legal:

input a : UInt<1>
input b : AsyncReset
output z : Reset
z <= a
z <= b

The second connect will when and z will be of type AsyncReset.

The following remains illegal:

input a : UInt<1>
input b : AsyncReset
input c : UInt<1>
output z : Reset
z <= a
when c :
  z <= b

This commit also ensures that components of type Reset with no drivers
(or only invalidation) default to type UInt<1>. This fixes a bug where
the transform would crash with such input.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

FirrtlOption and CircuitOption represent, respectively, something that
is convertible to FirrtlOptions or something that is convertible to a
FirrtlCircuitAnnotation. Neither of these is intended to be serialized
automatically in output JSON.

This has the effect of *not* JSON-serializing the
FirrtlCircuitAnnotation. This serialization is supposed to be to a
file via an emitter.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

The switch to using our own Logger triggered a latent bug, described in comments to #1258. Make the `val logger` introduced by the 'trait LazyLogging` protected.

This moves the --no-dedup option to be FIRRTL-stage specific as
opposed to a global option common to all stages.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

Remove scala-logging fully in favor of our own logger

There was some vestigial logging that conflicts with the homebrewed
logger used by most of the codebase

* Types containing bundles can't generally be converted to a single mask granularity

* Update ReplSeqMemTests to check for illegal masks

[Mergify] Automatically merge backport PRs when ready

* Closes #1242

Use Mergify to automate backporting to 1.2.x