Commit f77487d3 authored by John Ingalls's avatar John Ingalls Committed by Jack Koenig
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Verilog emitter transform InlineNots (#1270)



[skip formal checks]

* ConstProp FoldEqual/FoldNotEqual propagate boolean (non-)equality with true/false
* transform InlineNots
* transform back-to-back Nots into straight rename
* swap mux with inverted select

Co-authored-by: default avatarJack Koenig <jack.koenig3@gmail.com>
parent dcf0076c
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