Verilog emitter transform InlineNots (#1270)
[skip formal checks]
* ConstProp FoldEqual/FoldNotEqual propagate boolean (non-)equality with true/false
* transform InlineNots
* transform back-to-back Nots into straight rename
* swap mux with inverted select
Co-authored-by:
Jack Koenig <jack.koenig3@gmail.com>
parent
dcf0076c
Please register or sign in to comment